Datasheet > IS43R86400E-6BL

IS43R86400E-6BL

更新时间： 2024-11-24 22:57:35

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
34页	770K
描述
IC DRAM 512M PARALLEL 166MHZ

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IS43R86400E-6BL 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	TBGA,	Reach Compliance Code：	compliant
Factory Lead Time：	8 weeks	风险等级：	5.63
访问模式：	FOUR BANK PAGE BURST	最长访问时间：	0.7 ns
其他特性：	PROGRAMMABLE CAS LATENCY; AUTO/SELF REFRESH	JESD-30 代码：	R-PBGA-B60
长度：	13 mm	内存密度：	536870912 bit
内存集成电路类型：	DDR DRAM	内存宽度：	8
功能数量：	1	端口数量：	1
端子数量：	60	字数：	67108864 words
字数代码：	64000000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	64MX8	封装主体材料：	PLASTIC/EPOXY
封装代码：	TBGA	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, THIN PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
座面最大高度：	1.2 mm	自我刷新：	YES
最大供电电压 (Vsup)：	2.7 V	最小供电电压 (Vsup)：	2.3 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	8 mm	Base Number Matches：	1

IS43R86400E-6BL 数据手册

IS43R86400E

IS43/46R16320E, IS43/46R32160E

16Mx32, 32Mx16, 64Mx8

512Mb DDR SDRAM

JANUARY 2020

FEATURES

DEVICE OVERVIEW

• VDD and VDDQ: 2.5V 0.2V ꢀ(5ꢁ (-6

• VDD and VDDQ: 2.5V 0.1V ꢀ(ꢂ6

• SSTL_2 compatible I/O

• Double(data rate architecture; two data transfers

per clock cycle

• Bidirectionalꢁ data strobe ꢀDQS6 is transmitted/

received with dataꢁ to be used in capturing data

at the receiver

• DQS is edge(aligned with data for READs and

centre(aligned with data for WRITEs

ISSI’s 512(Mbit DDR SDRAM achieves high speed data

transfer using pipeline architecture and two data word

accesses per clock cycle. The 53-ꢁ870ꢁ912(bit memory

array is internally organized as four banks of 128Mb to

allow concurrent operations. The pipeline allows Read

and Write burst accesses to be virtually continuousꢁ with

the option to concatenate or truncate the bursts. The

programmable features of burst lengthꢁ burst sequence

and CAS latency enable further advantages. The device

is available in 8(bitꢁ 1-(bit and 32(bit data word size

Input data is registered on the I/O pins on both edges

of Data Strobe signalꢀs6ꢁ while output data is referenced

to both edges of Data Strobe and both edges of CLK.

Commands are registered on the positive edges of CLK.

• Differential clock inputs ꢀCK and CK6

• DLL aligns DQ and DQS transitions with CK

transitions

• Commands entered on each positive CK edge;

data and data mask referenced to both edges of

DQS

An Auto Refresh mode is providedꢁ along with a Self

Refresh mode. All I/Os are SSTL_2 compatible.

ADDRESS TABLE

• Four internal banks for concurrent operation

• Data Mask for write data. DM masks write data

at both rising and falling edges of data strobe

• Burst Length: 2ꢁ ꢂ and 8

Parameter

16M x 32

32M x 16

64M x 8

Conﬁguration

ꢂM x 32 x ꢂ

banks

8M x 1- x ꢂ

banks

1-M x 8 x ꢂ

banks

• Burst Type: Sequential and Interleave mode

• Programmable CAS latency: 2ꢁ 2.5 and 3

• Auto Refresh and Self Refresh Modes

• Concurrent Auto Precharge Supported

• TRAS Lockout supported ꢀtRAP = tRCD6

Bank Address Pins

BA0ꢁ BA1

A10/AP

BA0ꢁ BA1

A10/AP

Autoprecharge Pins A8/AP

Row Address

8KꢀA0 – A126 8KꢀA0 – A126 8KꢀA0 – A126

Column Address

512ꢀA0 – A7ꢁ 1KꢀA0 – A96

A96

2KꢀA0 – A9ꢁ

A116

Refresh Count

Com./Ind./A1

OPTIONS

8K / -ꢂms

8K / 1-ms

8K / -ꢂms

8K / 1-ms

8K / -ꢂms

8K / 1-ms

• Conﬁgurationꢀs6: 1-Mx32ꢁ 32Mx1-ꢁ -ꢂMx8

• Packageꢀs6:

1ꢂꢂ Ball BGA ꢀx326

--(pin TSOP(II ꢀx8ꢁ x1-6 and -0 Ball BGA ꢀx8ꢁ x1-6

• Lead(free package

KEY TIMING PARAMETERS

Speed Grade

-4

-5

-6

Units

x8, x16

• Temperature Range:

only

Commercial ꢀ0°C to +70°C6

Industrial ꢀ(ꢂ0°C to +85°C6

Automotiveꢁ A1 ꢀ(ꢂ0°C to +85°C6

Automotiveꢁ A2 ꢀ(ꢂ0°C to +105°C6

FCk Max CL = 3

FCk Max CL = 2.5

FCk Max CL = 2

250

1-7

133

200

1-7

133

1-7

133

MHz

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest

version of this device speciﬁcation before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-

ably be expected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for use in such applications

unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc.

Rev. B

01/13/2020

12 3 4 5 6 7...34

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与IS43R86400E-6BL相关器件

型号	品牌	获取价格	描述	数据表
IS43R86400E-6BLI	ISSI	获取价格	IC DRAM 512M PARALLEL 166MHZ
IS43R86400E-6BLI-TR	ISSI	获取价格	IC DRAM 512M PARALLEL 166MHZ
IS43R86400E-6BL-TR	ISSI	获取价格	IC DRAM 512M PARALLEL 166MHZ
IS43R86400E-6TLI	ISSI	获取价格	IC DRAM 512M PARALLEL 166MHZ
IS43R86400E-6TLI-TR	ISSI	获取价格	IC DRAM 512M PARALLEL 166MHZ
IS43R86400F-5BL	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, FBGA-60
IS43R86400F-5BLI	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, FBGA-60
IS43R86400F-5TL	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PDSO66, TSOP2-66
IS43R86400F-5TLI	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PDSO66, TSOP2-66
IS43R86400F-6BL	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, FBGA-60

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