Datasheet > IS43DR86400-25DBLI

IS43DR86400-25DBLI

更新时间： 2024-11-28 06:31:11

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器双倍数据速率
页数	文件大小	规格书
29页	860K
描述
DDR DRAM, 64MX8, CMOS, PBGA60, 10 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, MO-207, FBGA-60

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IS43DR86400, IS43/46DR16320

PRELIMINARY INFORMATION

NOVEMBER 2009

512Mb (x8, x16) DDR2 SDRAM

FEATURES

•

Clock frequency up to 400MHz

•

On‐Chip DLL aligns DQ and DQs transitions with

CK transitions

Differential clock inputs CK and CK#

VDD and VDDQ = 1.8V ± 0.1V

PASR (Partial Array Self Refresh)

SSTL_18 interface

Posted CAS

•

Programmable CAS Latency: 3, 4, 5 and 6

Programmable Additive Latency: 0, 1, 2, 3, 4 and 5

Write Latency = Read Latency‐1

Programmable Burst Sequence: Sequential or

Interleave

tRAS lockout supported

•

Programmable Burst Length: 4 and 8

Automatic and Controlled Precharge Command

Power Down Mode

Read Data Strobe supported (x8 only)

Internal four bank operations with single pulsed

RAS

•

Operating temperature:

Auto Refresh and Self Refresh

Commercial (T_A= 0°C to +70°C ; T_C= 0°C to 85°C)

Industrial (T_A= ‐40°C to +85°C; T_C= ‐40°C to 95°C)

Automotive, A1 (T_A= ‐40°C to +85°C; T_C= ‐40°C to

95°C)

Refresh Interval: 7.8 μs (8192 cycles/64 ms)

OCD (Off‐Chip Driver Impedance Adjustment)

ODT (On‐Die Termination)

Weak Strength Data‐Output Driver Option

Bidirectional differential Data Strobe (Single‐

ended data‐strobe is an optional feature)

OPTIONS

ADDRESS TABLE

Parameter

64Mx8

A0‐A13

A0‐A9

BA0‐BA1

A10

32Mx16

A0‐A12

A0‐A9

BA0‐BA1

A10

• Configuration:

Row Addressing

Column Addressing

Bank Addressing

Precharge Addressing

−

64Mx8 (16M x 8 x 4 banks)

32Mx16 (8M x 16 x 4 banks)

• Package:

−

60‐ball FBGA for x8

84‐ball FBGA for x16

Clock Cycle Timing

‐5B

‐37C

‐3D

‐25E

‐25D

Units

Speed Grade

CL‐tRCD‐tRP

tCK (CL=3)

DDR2‐400B

DDR2‐533C

DDR2‐667D

DDR2‐800E

DDR2‐800D

3‐3‐3

4‐4‐4

3.75

5‐5‐5

3.75

6‐6‐6

3.75

5‐5‐5

3.75

tCK

tCK (CL=4)

tCK (CL=5)

3.75

266

2.5

400

tCK (CL=6)

2.5

400

Frequency (max)

200

333

MHz

Note: The ‐5B device specification is shown for reference only.

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the

latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. – www.issi.com –

Rev. 00A, 11/17/2009

12 3 4 5 6 7...29

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与IS43DR86400-25DBLI相关器件

型号	品牌	获取价格	描述	数据表
IS43DR86400-25EBLI	ISSI	获取价格	DDR DRAM, 64MX8, CMOS, PBGA60, 10 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, MO-207, FBGA-60
IS43DR86400-37CBL	ISSI	获取价格	DDR DRAM, 64MX8, CMOS, PBGA60, 10 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, MO-207, FBGA-60
IS43DR86400-37CBLI	ISSI	获取价格	DDR DRAM, 64MX8, CMOS, PBGA60, 10 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, MO-207, FBGA-60
IS43DR86400B	ISSI	获取价格	512Mb (x8, x16) DDR2 SDRAM
IS43DR86400B-25DBI	ISSI	获取价格	512Mb (x8, x16) DDR2 SDRAM
IS43DR86400B-25DBLI	ISSI	获取价格	512Mb (x8, x16) DDR2 SDRAM
IS43DR86400B-25DBLI-TR	ISSI	获取价格	DDR DRAM, 64MX8, 0.4ns, CMOS, PBGA60, 10 X 10.50 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD F
IS43DR86400B-25EBLI	ISSI	获取价格	512Mb (x8, x16) DDR2 SDRAM
IS43DR86400B-25EBLI-TR	ISSI	获取价格	DDR DRAM, 64MX8, 0.4ns, CMOS, PBGA60, 10 X 10.50 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD F
IS43DR86400B-37CBLI	ISSI	获取价格	512Mb (x8, x16) DDR2 SDRAM

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