5秒后页面跳转
IS25C256-3P PDF预览

IS25C256-3P

更新时间: 2024-01-26 04:54:17
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
12页 60K
描述
EEPROM, 32KX8, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, DIP-8

IS25C256-3P 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, DIP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.92
最大时钟频率 (fCLK):2.1 MHzJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.3218 mm
内存密度:262144 bit内存集成电路类型:EEPROM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:8
字数:32768 words字数代码:32000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:4.572 mm
串行总线类型:SPI最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mm最长写入周期时间 (tWC):10 ms
Base Number Matches:1

IS25C256-3P 数据手册

 浏览型号IS25C256-3P的Datasheet PDF文件第1页浏览型号IS25C256-3P的Datasheet PDF文件第2页浏览型号IS25C256-3P的Datasheet PDF文件第3页浏览型号IS25C256-3P的Datasheet PDF文件第5页浏览型号IS25C256-3P的Datasheet PDF文件第6页浏览型号IS25C256-3P的Datasheet PDF文件第7页 
IS25C128-2/3  
IS25C256-2/3  
®
ISSI  
FUNCTIONAL DESCRIPTIONS  
The IS25C128/256 utilizes an 8-bit instruction register.  
The list of instructions and their operation codes are  
contained in Table 1. All instructions, addresses, and data  
are transferred with the MSB first and start with a high-to  
low CS transition.  
Table 3. Read Status Register Bit Definition  
Bit  
Definition  
Bit 0 (RDY)  
Bit 0 = 0 (RDY) indicates the device is  
READY. Bit 0 = 1 indicates the write  
cycle is in progress.  
Bit 1(WEN)  
Bit 1 = 0 indicates the device is not  
WRITE ENABLED. Bit 1 = 1 indicates  
the device is WRITE ENABLED.  
Table 1. Instruction Set  
Instruction  
Format  
Bit 2 (BPO)  
Bit 3 (BP1)  
See Table 4  
See Table 4  
Name  
Operation  
WREN  
WRDI  
RDSR  
WRSR  
READ  
WRITE  
0000 X110  
0000 X100  
0000 X101  
0000 X001  
Set Write Enable Latch  
Reset Write Enable Latch  
Read Status Register  
Write Status Register  
Bits 4 - 6 are 0s when the device is not an internal write cycle.  
Bits 7 (WPEN) See Table 5.  
Bits 0-7 are 1s during an internal write cycle.  
0000 X011 Read Data from Memory Array  
0000 X010 Write Data to Memory Array  
WRITE STATUS REGISTER (WRSR): The WRSR in-  
struction allows the user to select one of four levels of  
protection. The device is divided into four array seg-  
ments. One quarter (1/4), one half (1/2) or all of the  
memory segments can be protected. Any of the data  
within any selected segment will therefore be READ only.  
The block write protection levels and corresponding  
status register control bits are shown in Table 4.  
WRITE ENABLE (WREN): This device will power-up in  
the write disable state when VCC is applied. All program-  
ming instructions must therefore be preceded by a Write  
Enable instruction.  
WRITE DISABLE (WRDI): To protect the device against  
inadvertent writes, the Write Disable instruction disables  
allprogrammingmodes. TheWRDIinstructionisindepen-  
dent of the status of the WP pin.  
The three bits, BP0, BP1 and WPEN are nonvolatile  
cells that have the same properties and functions as the  
regular memory cells (e.g. WREN, twc, RDSR).  
READ STATUS REGISTER (RDSR):  
The Read Status Register instruction provides access to  
the status register. The READY/BUSY and Write Enable  
status of the device can be determined by the RDSR  
instruction. Similarly, the Block Write Protection bits  
indicate the extent of protection employed. These bits are  
set by using the WRSR instruction.  
Table 4. Status Register Format  
Status  
Register  
Bits  
Array Addresses Protected  
Level  
0
BP1 BP0  
IS25C128  
IS25C256  
0
0
0
1
None  
None  
Table 2. Status Register Format  
1(1/4)  
3000  
-3FFF  
6000  
-7FFF  
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit1 Bit 0  
2(1/2)  
3(All)  
1
1
0
1
2000  
4000  
WPEN  
x
x
x
BP1 BP0 WEN RDY  
-3FFF  
-7FFF  
0000  
0000  
-3FFF  
-7FFF  
4
Integrated Silicon Solution, Inc. — 1-800-379-4774  
PRELIMINARYINFORMATION Rev. 00A  
11/01/01  

与IS25C256-3P相关器件

型号 品牌 描述 获取价格 数据表
IS25C256-3PA3 ISSI 128K-bit/ 256K-bit SPI SERIAL ELECTRICALLY ERASABLE PROM

获取价格

IS25C256-3PI ISSI EEPROM, 32KX8, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, DIP-8

获取价格

IS25C256-3PLA3 ISSI 128K-bit/ 256K-bit SPI SERIAL ELECTRICALLY ERASABLE PROM

获取价格

IS25C256-3WA3 ISSI 128K-bit/ 256K-bit SPI SERIAL ELECTRICALLY ERASABLE PROM

获取价格

IS25C256-3WLA3 ISSI 128K-bit/ 256K-bit SPI SERIAL ELECTRICALLY ERASABLE PROM

获取价格

IS25C256-3ZI ISSI EEPROM, 32KX8, Serial, CMOS, PDSO8, TSSOP-8

获取价格