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IS24C128B-3PLA3 PDF预览

IS24C128B-3PLA3

更新时间： 2024-09-20 21:02:31
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
20页 242K
描述
EEPROM, 16KX8, Serial, CMOS, PDIP8, 0.300 INCH, LEAD FREE, PLASTIC DIP-8

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中文翻译

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IS24C128B-3PLA3 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.51风险等级：5.82
最大时钟频率 (fCLK)：1 MHzJESD-30 代码：R-PDIP-T8
JESD-609代码：e3长度：9.325 mm
内存密度：131072 bit内存集成电路类型：EEPROM
内存宽度：8湿度敏感等级：3
功能数量：1端子数量：8
字数：16384 words字数代码：16000
工作模式：SYNCHRONOUS最高工作温度：125 °C
最低工作温度：-40 °C组织：16KX8
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
并行/串行：SERIAL峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：4.57 mm
串行总线类型：I2C最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：AUTOMOTIVE端子面层：Matte Tin (Sn) - annealed
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：10
宽度：7.62 mm最长写入周期时间 (tWC)：5 ms
Base Number Matches：1

IS24C128B-3PLA3 数据手册

 浏览型号IS24C128B-3PLA3的Datasheet PDF文件第2页浏览型号IS24C128B-3PLA3的Datasheet PDF文件第3页浏览型号IS24C128B-3PLA3的Datasheet PDF文件第4页浏览型号IS24C128B-3PLA3的Datasheet PDF文件第5页浏览型号IS24C128B-3PLA3的Datasheet PDF文件第6页浏览型号IS24C128B-3PLA3的Datasheet PDF文件第7页 
IS24C128B  
128K-bit  
2-WIRE SERIAL CMOS EEPROM  
ADVANCEDINFORMATION  
JUNE2007  
FEATURES  
DESCRIPTION  
• Two-Wire Serial Interface, I2CTM compatible  
–Bi-directional data transfer protocol  
• Wide Voltage Operation  
The IS24C128B is an electrically erasable PROM  
device that uses the standard 2-wire interface for  
communications. The IS24C128B is 128K-bit (16Kx8).  
These EEPROM are offered in a wide operating voltage  
range of 1.8V to 5.5V to be compatible with most  
application voltages. ISSI designed the IS24C128B to  
be an efficient 2-wire EEPROM solution. The devices  
are packaged in 8-pin PDI, 8-pin TSSOP, 8-pin  
(JEDEC) SOIC, and 8-pin (EIAJ) SOIC.  
–Vcc = 1.8V to 5.5V  
• 400 KHz (1.8V) and 1 MHz (5.0V) compatibility  
• Low Power CMOS Technology  
–Active Current less than 3 mA (1.8V)  
–Standby Current less than 15 µA (1.8V)  
• Hardware Data Protection  
–Write Protect Pin  
The IS24C128B maintains compatibility with the  
popular 2-wire bus protocol, so it is easy to design into  
applications implementing this bus type. The simple  
bus consists of the Serial Clock wire (SCL) and the  
Serial Data wire (SDA). Using the bus, a Master device  
such as a microcontroller is usually connected to one  
or more Slave devices such as the IS24C128B. The  
bit stream over the SDA line includes a series of bytes,  
which identifies a particular Slave device, an  
instruction, an address within that Slave device, and a  
series of data, if appropriate. The IS24C128B has a  
Write Protect pin (WP) to allow blocking of any write  
instruction transmitted over the bus.  
• Sequential Read Feature  
• Filtered Inputs for Noise Suppression  
• Self time write cycle with auto clear  
–5 ms @ 1.8V  
• Organization:  
–16Kx8 (256 pages of 64 bytes)  
• 64 Byte Page Write Buffer  
• High Reliability  
–Endurance: 1,000,000 Cycles  
–Data Retention: 40 Years  
• Industrial and Automotive temperature ranges  
• 8-pin PDIP, 8-pin TSSOP, 8-pin (JEDEC) SOIC,  
and 8-pin (EIAJ) SOIC packages  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com  
1
ADVANCEDINFORMATION Rev. 00C  
06/14/07  
1234567...20

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IS24C16-2 ISSI

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IS24C16-2GL ISSI

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 		暂无描述
IS24C16-2P ISSI

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 		1K-bit/2K-bit/4K-bit/8K-bit/16K-bit 2-WIRE SERIAL CMOS EEPROM

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