Z9952
3.3V, 180MHz, Multi-Output Zero Delay Buffer
Product Features
Frequency Table
VCO_SEL SEL (A:C) QA(0:4) QB(0:3) QC (0,1)
•
•
•
•
•
•
•
•
•
•
•
•
180MHz Clock Support
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
VCO/4
VCO/4
VCO/4
VCO/4
VCO/6
VCO/6
VCO/6
VCO/6
VCO/8
VCO/8
VCO/8
VCO/8
VCO/12
VCO/12
VCO/12
VCO/4
VCO/4
VCO/2
VCO/2
VCO/4
VCO/4
VCO/2
VCO/2
VCO/8
VCO/8
VCO/4
VCO/4
VCO/8
VCO/8
VCO/4
VCO/4
VCO/2
VCO/4
VCO/2
VCO/4
VCO/2
VCO/4
VCO/2
VCO/4
VCO/4
VCO/8
VCO/4
VCO/8
VCO/4
VCO/8
VCO/4
VCO/8
150ps Maximum Output to Output Skew
Supports PowerPCTM, Intel and RISC Processors
11 Clock Outputs: Frequency Configurable
Outputs Drive up to 22 Clock Lines
LVCMOS/LVTTL Compatible Inputs
Output Tri-state Control
Spread Spectrum Compatible
3.3V Power Supply
Pin Compatible with MPC952
Industrial Temp. Range: -40°C to +85°C
32-Pin TQFP Package
Block Diagram
PLL_EN#
VCO/12
Table 1
REFCLK
QA0
Phase
Detector
VCO
200-480M
/4,
/6
/2
QA1
QA2
QA3
QA4
FB_IN
Pin Configuration
LPF
VCO_SEL
SELA
/4,
/2
QB0
QB1
SELB
QB2
QB3
VCO_SEL
SELC
SELB
1
2
3
4
5
6
7
8
24
23
22
21
VSS
QB1
QB0
VDDC
SELA
MR/OE#
REFCLK
VSS
Z9952 20 VDDC
/2,
/4
QC0
QC1
19
18
17
QA4
QA3
VSS
FB_IN
SELC
MR/OE#
Figure 1
Cypress Semiconductor Corporation
http://www.cypress.com
Document#: 38-07085 Rev. *B
12/22/2002
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