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IDT74ALVCH373SO8 PDF预览

IDT74ALVCH373SO8

更新时间: 2024-11-07 04:38:55
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
6页 62K
描述
Bus Driver, ALVC/VCX/A Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 1.27 MM PITCH, SOIC-20

IDT74ALVCH373SO8 数据手册

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3.3V CMOS OCTAL  
IDT74ALVCH373  
TRANSPARENT D-TYPE  
LATCH WITH 3-STATE  
OUTPUTS AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
This octal transparent D-type latch is built using advanced dual metal  
CMOS technology. The ALVCH373 device is particularly suitable for  
implementing buffer registers, I/O ports, bidirectional bus drivers, and  
working registers. While the latch-enable (LE) input is high, the Q outputs  
follow the data (D) inputs. When LE is taken low, the Q outputs are latched  
at the logic levels set up at the D inputs.  
• 0.5 MICRON CMOS Technology  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in QSOP, SOIC, SSOP, and TSSOP packages  
Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs  
in either a normal logic state (high or low logic levels) or a high-impedance  
state.Inthehigh-impedancestate,theoutputsneitherloadnordrivethebus  
lines significantly. The high-impedance state and increased drive provide  
the capability to drive bus lines without interface or pullup components.  
The ALVCH373 has been designed with a ±24mA output driver. This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Suitable for Heavy Loads  
The ALVCH373 has a “bus-hold” which retains the inputs’ last state  
whenever the input bus goes to a high impedance. This prevents floating  
inputs and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1
OE  
11  
LE  
C1  
1D  
2
1Q  
3
1D  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
©1999 Integrated Device Technology, Inc.  
DSC-4474/1  

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