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IDT74ALVCHR162245PF8 PDF预览

IDT74ALVCHR162245PF8

更新时间: 2024-11-06 17:50:23
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路电视
页数 文件大小 规格书
6页 73K
描述
Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.40 MM PITCH, TVSOP-48

IDT74ALVCHR162245PF8 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:TSSOP,
针数:48Reach Compliance Code:compliant
风险等级:5.61其他特性:WITH DIRECTION CONTROL
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
长度:9.7 mm逻辑集成电路类型:BUS TRANSCEIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):4.7 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

IDT74ALVCHR162245PF8 数据手册

 浏览型号IDT74ALVCHR162245PF8的Datasheet PDF文件第2页浏览型号IDT74ALVCHR162245PF8的Datasheet PDF文件第3页浏览型号IDT74ALVCHR162245PF8的Datasheet PDF文件第4页浏览型号IDT74ALVCHR162245PF8的Datasheet PDF文件第5页浏览型号IDT74ALVCHR162245PF8的Datasheet PDF文件第6页 
3.3V CMOS 16-BIT  
BUS TRANSCIEVER  
WITH 3-STATE OUTPUTS  
AND BUS-HOLD  
IDT74ALVCHR162245  
DESCRIPTION:  
FEATURES:  
This 16-bit bus transceiver is built using advanced dual metal CMOS  
technology. The ALVCHR162245 device is designed for asynchronous  
communicationbetweendatabuses.Thecontrol-functionimplementation  
minimizesexternaltimingrequirements.  
• 0.5 MICRON CMOS Technology  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
This device can be used as two 8-bit transceivers or one 16-bit  
transceiver. ItallowsdatatransmissionfromtheAbustotheBbusorfrom  
theBbustotheAbus, dependingonthelogiclevelatthedirectioncontrol  
(DIR) input. The output-enable (OE) input can be used to disable the  
device so that the buses are effectively isolated.  
TheALVCHR162245hasseriesresistorsinthedeviceoutputstructure  
which will significantly reduce line noise when used with light loads. This  
driver has been designed to drive ±12mA at the designated threshold  
levels.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in SSOP, TSSOP, and TVSOP packages  
DRIVE FEATURES:  
• Balanced Output Drivers: ±12mA  
• Low Switching Noise  
TheALVCHR162245hasbus-holdwhichretainstheinputslaststate  
whenever the input bus goes to a high impedance. This prevents floating  
inputs and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONAL BLOCK DIAGRAM  
1
24  
1DIR  
2DIR  
48  
25  
1OE  
1B1  
2OE  
47  
36  
1A1  
2A1  
2
13  
2B1  
46  
35  
1A2  
2A2  
3
14  
2B2  
1B2  
1B3  
1B4  
44  
33  
1A3  
2A3  
5
16  
2B3  
43  
32  
1A4  
2A4  
6
17  
2B4  
41  
30  
1A5  
2A5  
19  
8
1B5  
1B6  
2B5  
40  
29  
1A6  
2A6  
9
20  
2B6  
38  
27  
1A7  
2A7  
11  
22  
1B7  
1B8  
2B7  
37  
26  
1A8  
2A8  
12  
23  
2B8  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4606/1  

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