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IDT72V3693L10PF PDF预览

IDT72V3693L10PF

更新时间: 2024-10-30 23:01:15
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路配套器件先进先出芯片时钟
页数 文件大小 规格书
30页 331K
描述
3.3 VOLT CMOS SyncFIFO WITH BUS-MATCHING

IDT72V3693L10PF 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP, QFP128,.63X.87,20
针数:128Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.74最长访问时间:6.5 ns
最大时钟频率 (fCLK):100 MHz周期时间:10 ns
JESD-30 代码:R-PQFP-G128JESD-609代码:e0
长度:20 mm内存密度:1179648 bit
内存集成电路类型:OTHER FIFO内存宽度:36
湿度敏感等级:3功能数量:1
端子数量:128字数:32768 words
字数代码:32000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX36可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP128,.63X.87,20封装形状:RECTANGULAR
封装形式:FLATPACK, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not Qualified座面最大高度:1.6 mm
最大待机电流:0.005 A子类别:FIFOs
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):3.15 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:14 mm
Base Number Matches:1

IDT72V3693L10PF 数据手册

 浏览型号IDT72V3693L10PF的Datasheet PDF文件第2页浏览型号IDT72V3693L10PF的Datasheet PDF文件第3页浏览型号IDT72V3693L10PF的Datasheet PDF文件第4页浏览型号IDT72V3693L10PF的Datasheet PDF文件第5页浏览型号IDT72V3693L10PF的Datasheet PDF文件第6页浏览型号IDT72V3693L10PF的Datasheet PDF文件第7页 
3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING  
16,384 x 36  
32,768 x 36  
65,536 x 36  
IDT72V3683  
IDT72V3693  
IDT72V36103  
Big- or Little-Endian format for word and byte bus sizes  
Retransmit Capability  
Reset clears data and configures FIFO, Partial Reset clears data  
but retains configuration settings  
FEATURES  
Memory storage capacity:  
IDT72V3683  
IDT72V3693  
IDT72V36103 – 65,536 x 36  
16,384 x 36  
32,768 x 36  
Mailbox bypass registers for each FIFO  
Free-running CLKA and CLKB may be asynchronous or  
coincident (simultaneous reading and writing of data on a single  
clock edge is permitted)  
Clock frequencies up to 100 MHz (6.5 ns access time)  
Clocked FIFO buffering data from Port A to Port B  
IDT Standard timing (using EF and FF) or First Word Fall  
Through Timing (using OR and IR flag functions)  
Programmable Almost-Empty and Almost-Full flags; each has  
five default offsets (8, 16, 64, 256 and 1,024)  
Serial or parallel programming of partial flags  
Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits  
(byte)  
Easily expandable in width and depth  
Auto power down minimizes power dissipation  
Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)  
Pin compatible with the lower density parts, IDT72V3623/  
72V3633/72V3643/72V3653/72V3663/72V3673  
Industrial temperature range (–40°C to +85°C) is available  
FUNCTIONAL BLOCK DIAGRAM  
MBF1  
Mail 1  
Register  
CLKA  
CSA  
Port-A  
W/RA  
Control  
ENA  
Logic  
MBA  
36  
RAM ARRAY  
36  
36  
FIFO1  
Mail1,  
Mail2,  
Reset  
Logic  
16,384 x 36  
32,768 x 36  
65,536 x 36  
RS1  
RS2  
PRS  
36  
RT  
RTM  
FIFO  
Retransmit  
Logic  
Write  
Pointer  
Read  
Pointer  
A0-A35  
B0-B35  
Status Flag  
Logic  
EF/OR  
AE  
FF/IR  
AF  
36  
36  
FS2  
FS0/SD  
FS1/SEN  
Programmable Flag  
Offset Registers  
Timing  
Mode  
FWFT  
16  
CLKB  
CSB  
W/RB  
ENB  
MBB  
BE  
Port-B  
Control  
Logic  
BM  
SIZE  
Mail 2  
Register  
4678 drw 01  
MBF2  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheSyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.  
COMMERICAL TEMPERATURE RANGE  
NOVEMBER 2003  
1
DSC-4678/2  
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  

IDT72V3693L10PF 替代型号

型号 品牌 替代类型 描述 数据表
IDT72V3694L10PF IDT

完全替代

3.3 VOLT CMOS SyncBiFIFOTM WITH BUS-MATCHING
IDT72V3690L6PFG8 IDT

功能相似

FIFO, 32KX36, 4ns, Synchronous, CMOS, PQFP128, PLASTIC, TQFP-128
SN74V3690-6PEU TI

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3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES

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