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IDT72T51543L5BB8 PDF预览

IDT72T51543L5BB8

更新时间: 2024-11-12 20:09:07
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
57页 533K
描述
FIFO, 64KX18, 3.6ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-256

IDT72T51543L5BB8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-256针数:256
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.92
最长访问时间:3.6 ns周期时间:5 ns
JESD-30 代码:S-PBGA-B256JESD-609代码:e0
长度:17 mm内存密度:1179648 bit
内存宽度:18湿度敏感等级:3
功能数量:1端子数量:256
字数:65536 words字数代码:64000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64KX18
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY并行/串行:PARALLEL
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:3.5 mm最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:20
宽度:17 mmBase Number Matches:1

IDT72T51543L5BB8 数据手册

 浏览型号IDT72T51543L5BB8的Datasheet PDF文件第2页浏览型号IDT72T51543L5BB8的Datasheet PDF文件第3页浏览型号IDT72T51543L5BB8的Datasheet PDF文件第4页浏览型号IDT72T51543L5BB8的Datasheet PDF文件第5页浏览型号IDT72T51543L5BB8的Datasheet PDF文件第6页浏览型号IDT72T51543L5BB8的Datasheet PDF文件第7页 
ADVANCE INFORMATION  
2.5V MULTI-QUEUE FLOW-CONTROL DEVICES  
(32 QUEUES) 18 BIT WIDE CONFIGURATION  
1,179,648 bits and 2,359,296 bits  
IDT72T51543  
IDT72T51553  
Shows PAE and PAF status of 8 Queues  
Direct or polled operation of flag status bus  
Global Bus Matching - (All Queues have same Input Bus Width  
and Output Bus Width)  
User Selectable Bus Matching Options:  
– x18in to x18out  
– x9in to x18out  
FEATURES:  
Choose from among the following memory density options:  
IDT72T51543  
IDT72T51553  
Configurable from 1 to 32 Queues  
Total Available Memory = 1,179,648 bits  
Total Available Memory = 2,359,296 bits  
Queues may be configured at master reset from the pool of  
Total Available Memory in blocks of 512 x 18 or 1,024 x 9  
Independent Read and Write access per queue  
User programmable via serial port  
User selectable I/O: 2.5V LVTTL, 1.5V HSTL, 1.8V eHSTL  
Default multi-queue device configurations  
IDT72T51543 : 2,048 x 18 x 32Q  
– x18in to x9out  
– x9in to x9out  
FWFT mode of operation on read port  
Partial Reset, clears data in single Queue  
Expansion of up to 8 multi-queue devices in parallel is available  
Power Down Input provides additional power savings in HSTL  
and eHSTL modes.  
JTAG Functionality (Boundary Scan)  
Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm  
HIGH Performance submicron CMOS technology  
Industrial temperature range (-40°C to +85°C) is available  
IDT72T51553 : 4,096 x 18 x 32Q  
100% Bus Utilization, Read and Write on every clock cycle  
200 MHz High speed operation (5ns cycle time)  
3.6ns access time  
Echo Read Enable & Echo Read Clock Outputs  
Individual, Active queue flags (OV, FF, PAE, PAF)  
8 bit parallel flag status on both read and write ports  
FUNCTIONALBLOCKDIAGRAM  
MULTI-QUEUE FLOW-CONTROL DEVICE  
RADEN  
ESTR  
Q0  
WADEN  
FSTR  
RDADD  
8
WRADD  
REN  
Q1  
Q2  
8
RCLK  
WEN  
EREN  
WCLK  
ERCLK  
OE  
Q
out  
x9, x18  
D
in  
x9, x18  
DATA IN  
DATA OUT  
OV  
FF  
PAF  
PAFn  
PAE  
PAEn  
Q31  
8
8
5999 drw01  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc  
NOVEMBER 2003  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-5999/3  

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