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IDT72291L20TFGI PDF预览

IDT72291L20TFGI

更新时间： 2024-11-13 13:08:43
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路先进先出芯片时钟
页数 文件大小 规格书
26页 270K
描述
FIFO, 128KX9, 12ns, Synchronous, CMOS, PQFP64, STQFP-64

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中文翻译

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IDT72291L20TFGI 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：QFP
包装说明：STQFP-64针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.84
Is Samacsys：N最长访问时间：12 ns
其他特性：RETRANSMIT; AUTO POWER DOWN; EASY EXPANDABLE IN DEPTH AND WIDTH周期时间：20 ns
JESD-30 代码：S-PQFP-G64JESD-609代码：e3
长度：10 mm内存密度：1179648 bit
内存宽度：9湿度敏感等级：3
功能数量：1端子数量：64
字数：131072 words字数代码：128000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：128KX9
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH并行/串行：PARALLEL
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.6 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：10 mmBase Number Matches：1

IDT72291L20TFGI 数据手册

 浏览型号IDT72291L20TFGI的Datasheet PDF文件第2页浏览型号IDT72291L20TFGI的Datasheet PDF文件第3页浏览型号IDT72291L20TFGI的Datasheet PDF文件第4页浏览型号IDT72291L20TFGI的Datasheet PDF文件第5页浏览型号IDT72291L20TFGI的Datasheet PDF文件第6页浏览型号IDT72291L20TFGI的Datasheet PDF文件第7页 
CMOS SuperSync FIFO™  
65,536 x 9  
131,072 x 9  
IDT72281  
IDT72291  
• Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64-  
pin Slim Thin Quad Flat Pack (STQFP)  
• High-performance submicron CMOS technology  
• Industrial temperature range (-40°C to +85°C) is available  
FEATURES:  
• Choose among the following memory organizations:  
IDT72281  
IDT72291  
65,536 x 9  
131,072 x 9  
• Pin-compatible with the IDT72261LA/72271LA SuperSync FIFOs  
• 10ns read/write cycle time (6.5ns access time)  
• Fixed, low first word data latency time  
• Auto power down minimizes standby power consumption  
• Master Reset clears entire FIFO  
• Partial Reset clears data, but retains programmable  
settings  
• Retransmit operation with fixed, low first word data  
latency time  
• Empty, Full and Half-Full flags signal FIFO status  
• Programmable Almost-Empty and Almost-Full flags, each flag  
can default to one of two preselected offsets  
• Program partial flags by either serial or parallel means  
• Select IDT Standard timing (using EF and FF flags) or First  
Word Fall Through timing (using OR and IR flags)  
• Output enable puts data outputs into high impedance state  
• Easily expandable in depth and width  
DESCRIPTION:  
TheIDT72281/72291areexceptionallydeep,highspeed,CMOSFirst-In-  
First-Out(FIFO)memorieswithclockedreadandwritecontrols. TheseFIFOs  
offernumerousimprovementsoverpreviousSuperSyncFIFOs,includingthe  
following:  
• Thelimitationofthefrequencyofoneclockinputwithrespecttotheotherhas  
been removed. The Frequency Select pin (FS) has been removed, thus  
it is no longer necessary to select which of the two clock inputs, RCLK or  
WCLK, is runningatthe higherfrequency.  
• The period required by the retransmit operation is now fixed and short.  
• Thefirstworddatalatencyperiod,fromthetimethefirstwordiswrittentoan  
emptyFIFOtothetimeitcanberead,isnowfixedandshort. (Thevariable  
clock cycle counting delay associated with the latency period found on  
previousSuperSyncdeviceshasbeeneliminatedonthisSuperSyncfamily.)  
SuperSyncFIFOsareparticularlyappropriatefornetwork,video,telecom-  
munications,datacommunicationsandotherapplicationsthatneedtobuffer  
largeamountsofdata.  
• Independent Read and Write clocks (permit reading and writing  
simultaneously)  
FUNCTIONALBLOCKDIAGRAM  
D0 -D8  
WEN  
WCLK  
LD  
SEN  
OFFSET REGISTER  
INPUT REGISTER  
FF/IR  
PAF  
EF/OR  
PAE  
FLAG  
LOGIC  
WRITE CONTROL  
LOGIC  
HF  
FWFT/SI  
RAM ARRAY  
65,536 x 9  
131,072 x 9  
WRITE POINTER  
READ POINTER  
READ  
CONTROL  
LOGIC  
RT  
OUTPUT REGISTER  
MRS  
PRS  
RESET  
LOGIC  
RCLK  
REN  
Q0 -Q8  
4675 drw01  
OE  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.TheSuperSyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
SEPTEMBER 2002  
1
2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-4675/2  
1234567...26

中文翻译

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