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IDT71V3579YS85BGI PDF预览

IDT71V3579YS85BGI

更新时间: 2024-10-29 09:28:03
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器
页数 文件大小 规格书
22页 236K
描述
Cache SRAM, 256KX18, 8.5ns, CMOS, PBGA119, BGA-119

IDT71V3579YS85BGI 数据手册

 浏览型号IDT71V3579YS85BGI的Datasheet PDF文件第15页浏览型号IDT71V3579YS85BGI的Datasheet PDF文件第16页浏览型号IDT71V3579YS85BGI的Datasheet PDF文件第17页浏览型号IDT71V3579YS85BGI的Datasheet PDF文件第19页浏览型号IDT71V3579YS85BGI的Datasheet PDF文件第20页浏览型号IDT71V3579YS85BGI的Datasheet PDF文件第21页 
IDT71V3577YS_79YS, IDT71V3577YSA_79YSA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with  
3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect  
Commercial and Industrial Temperature Ranges  
Non-Burst Read Cycle Timing Waveform  
CLK  
ADSP  
ADSC  
Av  
Aw  
Ax  
Ay  
Az  
ADDRESS  
GW, BWE, BWx  
CE, CS  
1
CS0  
OE  
(Av)  
(Aw)  
(Ax)  
(Ay)  
DATAOUT  
,
6450 drw 10  
NOTES:  
1. ZZ input is LOW, ADV is HIGH and LBO is Don't Care for this cycle.  
2. (Ax) represents the data for address Ax, etc.  
3. For read cycles, ADSP and ADSC function identically and are therefore interchangable.  
Non-Burst Write Cycle Timing Waveform  
CLK  
ADSP  
ADSC  
Av  
Aw  
Ax  
Ay  
Az  
ADDRESS  
GW  
CE, CS  
1
CS0  
(Av)  
(Aw)  
(Ax)  
(Ay)  
(Az)  
DATAIN  
,
6450 drw 11  
NOTES:  
1. ZZ input is LOW, ADV and OE are HIGH, and LBO is Don't Care for this cycle.  
2. (Ax) represents the data for address Ax, etc.  
3. Although only GW writes are shown, the functionality of BWE and BWx together is the same as GW.  
4. For write cycles, ADSP and ADSC have different limitations.  
6.1482  

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