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IDT71215S9PF PDF预览

IDT71215S9PF

更新时间： 2024-11-15 22:18:47
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路静态存储器信息通信管理
页数 文件大小 规格书
14页 158K
描述
BiCMOS StaticRAM 240K (16K x 15-BIT) CACHE-TAG RAM For the PentiumO Processor

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中文翻译

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IDT71215S9PF 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：PLASTIC, TQFP-80
针数：80Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.32.00.41
风险等级：5.87Is Samacsys：N
最长访问时间：9 nsJESD-30 代码：S-PQFP-G80
JESD-609代码：e0长度：14 mm
内存密度：245760 bit内存集成电路类型：CACHE TAG SRAM
内存宽度：15湿度敏感等级：3
功能数量：1端口数量：1
端子数量：80字数：16384 words
字数代码：16000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：16KX15输出特性：3-STATE
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装等效代码：QFP80,.64SQ
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE
并行/串行：PARALLEL电源：3.3/5,5 V
认证状态：Not Qualified座面最大高度：1.6 mm
最大待机电流：0.025 A子类别：SRAMs
最大压摆率：0.3 mA最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn85Pb15)
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD宽度：14 mm
Base Number Matches：1

IDT71215S9PF 数据手册

 浏览型号IDT71215S9PF的Datasheet PDF文件第2页浏览型号IDT71215S9PF的Datasheet PDF文件第3页浏览型号IDT71215S9PF的Datasheet PDF文件第4页浏览型号IDT71215S9PF的Datasheet PDF文件第5页浏览型号IDT71215S9PF的Datasheet PDF文件第6页浏览型号IDT71215S9PF的Datasheet PDF文件第7页 
BiCMOS StaticRAM  
240K (16K x 15-BIT)  
CACHE-TAG RAM  
IDT71215  
For the Pentium Processor  
Integrated Device Technology, Inc.  
This high-speed MATCH signal, with tADM as fast as 8ns,  
provides the fastest possible enabling of secondary cache  
accesses.  
FEATURES:  
• 16K x 15 Configuration  
– 12 TAG Bits  
The three separate I/O status bits (VLD, DTY, and WT) can  
be configured for either dedicated or generic functionality,  
depending on the SFUNC input pin. With SFUNC LOW, the  
status bits are defined and used internally by the device,  
allowing easier determination of the validity and use of the  
given Tag data. SFUNC HIGH releases the defined internal  
status bit usage and control, allowing the user to configure the  
status bit information to fit his system needs. A synchronous  
RESET pin, when held LOW at a rising clock edge, will reset  
all status bits in the array for easy invalidation of all Tag  
addresses.  
The IDT71215 also provides the option for Burst Ready  
(BRDY) generation within the cache tag itself, based upon  
MATCH, VLD bit, WT bit, and external inputs provided by the  
user. This can significantly simplify cache controller logic and  
minimize cache decision time. Match and Read operations  
are both asynchronous in order to provide the fastest access  
times possible, while Write operations are synchronous for  
ease of system timing.  
– 3 Separate I/O Status Bits (Valid, Dirty, Write Through)  
• Match output uses Valid bit to qualify MATCH output  
• High-Speed Address-to-Match comparison times  
– 8/9/10/12ns over commercial temperature range  
• BRDY circuitry included inside the Cache-Tag for highest  
speed operation  
• Asynchronous Read/Match operation with Synchronous  
Write and Reset operation  
• Separate WE for the TAG bits and the Status bits  
• Separate OE for the TAG bits, the Status bits, and BRDY  
• Synchronous RESET pin for invalidation of all Tag entries  
• Dual Chip selects for easy depth expansion with no  
performance degredation  
• I/O pins both 5V TTL and 3.3V LVTTL compatible with  
VCCQ pins  
• PWRDN pin to place device in low-power mode  
• Packaged in a 80-pin Thin Plastic Quad Flat Pack  
(TQFP)  
The IDT71215 uses a 5V power supply on Vcc with sepa-  
rate VCCQ pins provided for the outputs to offer compliance  
withboth5.0VTTLand3.3VLVTTLLogiclevels. ThePWRDN  
pin offers a low-power standby mode to reduce power con-  
sumption by 90%, providing significant system power sav-  
ings.  
The IDT71215 is fabricated using IDT's high-performance,  
high-reliability BiCMOS technology and is offered in a space-  
saving 80-pin Thin Plastic Quad Flat Pack (TQFP) package.  
DESCRIPTION:  
The IDT71215 is a 245,760-bit Cache Tag StaticRAM,  
organized 16K x 15 and designed to support the Pentium and  
other Intel processors at bus speeds up to 66MHz. There are  
twelve common I/O TAG bits, with the remaining three bits  
usedasstatusbits. A12-bitcomparatorison-chiptoallowfast  
comparison of the twelve stored TAG bits and the current Tag  
input data. An active HIGH MATCH output is generated when  
these two groups of data are the same for a given address.  
PIN DESCRIPTIONS  
CLK  
System Clock  
Input  
Input  
Input  
Input  
Output  
I/O  
A0 – A13  
CS1, CS2  
WET  
Address Inputs  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
BRDYH  
BRDYOE  
BRDYIN  
BRDY  
BRDY Force High  
BRDY Output Enable  
Additional BRDY Input  
Burst Ready  
Chip Selects  
Write Enable - Tag Bits  
Write Enable - Status Bits  
Output Enable - Tag Bits  
Output Enable - Status Bits  
Status Bit Reset  
WES  
OET  
TAG0 – TAG11 Tag Data Input/Outputs  
VLDOUT / S1OUT Valid Bit / S1 Bit Output  
DTYOUT / S2OUT Dirty Bit / S2 Bit Output  
OES  
Output  
Output  
Output  
Output  
Pwr  
RESET  
PWRDN  
SFUNC  
W/R  
Powerdown Mode Control Pin  
Status Bit Function Control Pin  
Write/Read Input from Processor  
WTOUT / S3OUT  
MATCH  
VCC  
Write Through Bit / S3 Bit Output  
Match  
+5V Power  
Output Buffer Power  
Ground  
VLDIN / S1IN Valid Bit / S1 Bit Input  
DTYIN / S2IN Dirty Bit / S2 Bit Input  
VCCQ  
VSS  
QPwr  
Gnd  
WTIN / S3IN  
Write Through Bit / S3 Bit Input  
3075 tbl 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
Pentium is a trademark of Intel Corporation  
COMMERCIAL TEMPERATURE RANGE  
AUGUST 1996  
1996 Integrated Device Technology, Inc.  
DSC-3075/3  
14.3  
1
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中文翻译

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与IDT71215S9PF相关器件

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IDT71215S9PF8 IDT

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 		Cache Tag SRAM, 16KX15, 9ns, BICMOS, PQFP80, PLASTIC, TQFP-80
IDT71215S9PF9 IDT

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 		Cache Tag SRAM, 16KX15, 9ns, BICMOS, PQFP80, PLASTIC, TQFP-80
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 		BiCMOS StaticRAM 240K (16K x 15-BIT) CACHE-TAG RAM For PowerPCO and RISC Processors
IDT71216S10PF IDT

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 		BiCMOS StaticRAM 240K (16K x 15-BIT) CACHE-TAG RAM For PowerPCO and RISC Processors
IDT71216S10PF8 IDT

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 		Cache Tag SRAM, 16KX15, 12ns, BICMOS, PQFP80, PLASTIC, TQFP-80
IDT71216S10PF9 IDT

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 		Cache Tag SRAM, 16KX15, 12ns, BICMOS, PQFP80, PLASTIC, TQFP-80
IDT71216S12PF IDT

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 		BiCMOS StaticRAM 240K (16K x 15-BIT) CACHE-TAG RAM For PowerPCO and RISC Processors
IDT71216S12PF8 IDT

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 		Cache Tag SRAM, 16KX15, 12ns, BICMOS, PQFP80, PLASTIC, TQFP-80
IDT71216S8PF IDT

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 		BiCMOS StaticRAM 240K (16K x 15-BIT) CACHE-TAG RAM For PowerPCO and RISC Processors
IDT71216S8PF8 IDT

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 		Cache Tag SRAM, 16KX15, 10ns, BICMOS, PQFP80, PLASTIC, TQFP-80

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