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IDT7052S20PFG8 PDF预览

IDT7052S20PFG8

更新时间: 2024-02-01 22:33:12
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
11页 121K
描述
Four-Port SRAM, 2KX8, 20ns, CMOS, PQFP120, PLASTIC, TQFP-120

IDT7052S20PFG8 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFP
包装说明:LFQFP,针数:120
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.21
Is Samacsys:N最长访问时间:20 ns
其他特性:AUTOMATIC POWER-DOWNJESD-30 代码:S-PQFP-G120
JESD-609代码:e3长度:14 mm
内存密度:16384 bit内存集成电路类型:FOUR-PORT SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:120
字数:2048 words字数代码:2000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:2KX8
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.4 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:14 mm
Base Number Matches:1

IDT7052S20PFG8 数据手册

 浏览型号IDT7052S20PFG8的Datasheet PDF文件第1页浏览型号IDT7052S20PFG8的Datasheet PDF文件第3页浏览型号IDT7052S20PFG8的Datasheet PDF文件第4页浏览型号IDT7052S20PFG8的Datasheet PDF文件第5页浏览型号IDT7052S20PFG8的Datasheet PDF文件第6页浏览型号IDT7052S20PFG8的Datasheet PDF文件第7页 
IDT7052S/L  
High-Speed 2K x 8 FourPort™ Static RAM  
Military, Industrial and Commercial Temperature Ranges  
systems whichcannottoleratewaitstates oraredesignedtobeableto  
Fabricated using IDTs CMOS high-performance technology, this  
externallyarbitrateorwithstandcontentionwhenallportssimultaneously FourPortSRAMtypicallyoperatesononly750mWofpower.Low-power  
accessthesameFourPortRAMlocation. (L)versionsofferbatterybackupdataretentioncapability,witheachport  
TheIDT7052providesfourindependentportswithseparatecontrol, typicallyconsuming50µWfroma2Vbattery.  
address,andI/Opinsthatpermitindependent, asynchronousaccessfor  
TheIDT7052ispackagedinaceramic108-pinPinGridArray(PGA),  
readsorwritestoanylocationinmemory.Itistheusersresponsibilityto 120-pinThinQuadFlatpack(TQFP)and132-pinPlasticQuadFlatpack  
ensuredataintegritywhensimultaneouslyaccessingthesamememory (PQF).Militarygradeproductismanufacturedincompliancewiththelatest  
locationfromallports.Anautomaticpowerdownfeature,controlledbyCE, revision of MIL-PRF-38535 QML, making it ideally suited to military  
permitstheon-chipcircuitryofeachporttoenteraverylowpowerstandby temperatureapplicationsdemandingthehighestlevelofperformanceand  
powermode.  
reliability.  
PinConfigurations(1,2,3)  
81  
80  
83  
86  
88  
91  
94  
97  
77  
78  
82  
85  
89  
93  
74  
76  
79  
72  
73  
75  
69  
70  
71  
68  
65  
64  
62  
63  
61  
60  
59  
55  
52  
48  
44  
57  
56  
51  
49  
46  
43  
40  
37  
34  
32  
29  
54  
W
NC  
A
7
A
5
A
3
A
0
A
3
A
5
7
A
P3  
R/W  
P3  
R/  
P2  
NC  
A0  
P3  
12  
11  
P2  
P2  
P2  
P2  
P3  
P3  
84  
67  
66  
53  
BUSY  
OE  
P2  
OE  
P3  
BUSY  
A8  
P2  
A10  
P2  
A4  
P2  
A1  
P2  
A1  
P3  
A4  
P3  
A10  
P3  
A8  
P3  
P2  
P3  
87  
58  
50  
CE  
A2  
P1  
A1  
P1  
A9  
P2  
A6  
P2  
A2  
P2  
A2  
P3  
A6  
P3  
A9  
P3  
A1  
P4  
A2  
P4  
10  
09  
08  
07  
06  
05  
04  
03  
02  
01  
CE  
P3  
90  
92  
95  
96  
99  
47  
45  
42  
41  
38  
5
A
A3  
P1  
A0  
P1  
A0  
P4  
A3  
P4  
A5  
P4  
P1  
A6  
P1  
A4  
P1  
A4  
P4  
A6  
P4  
A10  
P4  
A10  
P1  
8
GND  
A
A7  
P4  
A8  
P1  
A7  
P1  
VCC  
IDT7052G  
G108-1(4)  
P4  
98  
39  
CE  
P4  
A9  
P4  
CE  
P1  
NC  
A9  
P1  
NC  
108-Pin PGA  
Top View(5)  
100  
102  
35  
OE  
P4  
OE  
P1  
GND  
R/W  
R/W  
I/O0  
P1  
P4  
P1  
101  
103  
106  
31  
36  
BUSY  
BUSY  
7
GND  
GND  
I/O  
I/O1  
P1  
P1  
P4  
P4  
104  
105  
1
5
6
4
7
8
12  
17  
21  
25  
28  
33  
I/O5  
P4  
I/O2  
P1  
I/O3  
P1  
I/O6  
P1  
I/O2  
P4  
I/O6  
P4  
GND  
VCC  
VCC  
GND VCC  
VCC  
107  
2
3
10  
13  
16  
19  
22  
24  
30  
I/O4  
P1  
I/O7  
P1  
I/O0  
P2  
I/O2  
P2  
I/O4  
P2  
I/O6  
P2  
I/O3  
P3  
I/O5  
P3  
I/O7  
P3  
I/O3  
P4  
I/O4  
P4  
I/O1  
P3  
108  
9
11  
14  
15  
18  
20  
23  
26  
27  
I/O1  
P2  
I/O5  
P2  
I/O4  
P3  
5
3
7
0
2
6
0
1
I/O  
NC  
B
I/O  
I/O  
P2  
I/O  
I/O  
I/O  
I/O  
I/O  
P4  
P1  
P2  
P3  
P3  
P3  
P4  
A
C
D
E
F
G
H
J
K
L
M
2674 drw 02  
INDEX  
NOTES:  
1. All VCC pins must be connected to the power supply.  
2. All GND pins must be connected to the ground supply.  
3. Package body is approximately 1.21 in x 1.21 in x .16 in.  
4. This package code is used to reference the package diagram.  
5. This text does not indicate orientation of the actual part-marking.  
2
6.42  

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