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IDT6116SA150TP PDF预览

IDT6116SA150TP

更新时间: 2024-11-04 22:34:19
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
10页 95K
描述
CMOS STATIC RAM 16K (2K x 8 BIT)

IDT6116SA150TP 数据手册

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IDT6116SA  
IDT6116LA  
CMOS STATIC RAM  
16K (2K x 8 BIT)  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• High-speed access and chip select times  
— Military: 20/25/35/45/55/70/90/120/150ns (max.)  
— Commercial: 15/20/25/35/45ns (max.)  
• Low-power consumption  
The IDT6116SA/LA is a 16,384-bit high-speed static RAM  
organized as 2K x 8. It is fabricated using IDT's high-perfor-  
mance, high-reliability CMOS technology.  
Access times as fast as 15ns are available. The circuit also  
offers a reduced power standby mode. When CSgoes HIGH,  
the circuit will automatically go to, and remain in, a standby  
power mode, as long as CS remains HIGH. This capability  
provides significant system level power and cooling savings.  
The low-power (LA) version also offers a battery backup data  
retention capability where the circuit typically consumes only  
1µW to 4µW operating off a 2V battery.  
All inputs and outputs of the IDT6116SA/LA are TTL-  
compatible. Fullystaticasynchronouscircuitryisused, requir-  
ing no clocks or refreshing for operation.  
The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil  
plasticorceramicDIP anda24-leadgull-wingSOIC, anda24  
-lead J-bend SOJ providing high board-level packing densi-  
ties.  
• Battery backup operation  
— 2V data retention voltage (LA version only)  
• Produced with advanced CMOS high-performance  
technology  
• CMOS process virtually eliminates alpha particle  
soft-error rates  
• Input and output directly TTL-compatible  
• Static operation: no clocks or refresh required  
• Available in ceramic and plastic 24-pin DIP, 24-pin Thin  
Dip and 24-pin SOIC and 24-pin SOJ  
• Military product compliant to MIL-STD-833, Class B  
Militarygradeproductismanufacturedincompliancetothe  
latest version of MIL-STD-883, Class B, making it ideally  
suited to military temperature applications demanding the  
highest level of performance and reliability.  
FUNCTIONAL BLOCK DIAGRAM  
A 0  
VCC  
128 X 128  
ADDRESS  
DECODER  
MEMORY  
GND  
ARRAY  
A 10  
I/O 0  
I/O CONTROL  
INPUT  
DATA  
CIRCUIT  
I/O7  
CS  
OE  
WE  
CONTROL  
CIRCUIT  
3089 drw 01  
The IDT logo is aregistered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
MARCH 1996  
1996 Integrated Device Technology, Inc.  
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.  
5.1  
3089/1  
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