Datasheet > IDT5V9888PFGI

IDT5V9888PFGI

更新时间： 2024-11-27 04:44:27

品牌	Logo	应用领域
艾迪悌 - IDT		时钟发生器可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
37页	340K
描述
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR

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技术参数
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IDT5V9888PFGI 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	GREEN, TQFP-32
针数：	32	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.81	JESD-30 代码：	S-PQFP-G32
JESD-609代码：	e3	长度：	7 mm
湿度敏感等级：	3	端子数量：	32
最高工作温度：	85 °C	最低工作温度：	-40 °C
最大输出时钟频率：	500 MHz	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装等效代码：	QFP32,.35SQ,32
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
主时钟/晶体标称频率：	400 MHz	认证状态：	Not Qualified
座面最大高度：	1.6 mm	子类别：	Clock Generators
最大压摆率：	12 mA	最大供电电压：	3.6 V
最小供电电压：	3 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	7 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, OTHER
Base Number Matches：	1

IDT5V9888PFGI 数据手册

IDT5V9888

INDUSTRIALTEMPERATURERANGE

3.3V EEPROMPROGRAMMABLECLOCKGENERATOR

IDT5V9888

3.3V EEPROM

PROGRAMMABLE CLOCK

GENERATOR

FEATURES:

DESCRIPTION:

• Three internal PLLs

The IDT5V9888 is a programmable clock generator intended for high

performancedata-communications,telecommunications,consumer,and

networking applications. There are three internal PLLs, each individually

programmable,allowingforthreeuniquenon-integer-relatedfrequencies.

The frequencies are generated from a single reference clock. The

reference clock can come from one of the two redundant clock inputs. A

glitchless automatic or manual switchover function allows any one of the

redundant clocks to be selected during normal operation.

• Internal non-volatile EEPROM

• JTAG and FAST mode I²C serial interfaces

• Input Frequency Ranges: 1MHz to 400MHz

• Output Frequency Ranges:

− LVTTL: up to 200MHz

− LVPECL/ LVDS: up to 500MHz

• Reference Crystal Input with programmable oscillator gain and

programmable linear load capacitance

− Crystal Frequency Range: 8MHz to 50MHz

• Each PLL has an 8-bit pre-scaler and a 12-bit feedback-divider

• 10-bit post-divider blocks

• Fractional Dividers

• Two of the PLLs support Spread Spectrum Generation

capability

• I/O Standards:

− Outputs - 3.3V LVTTL/ LVCMOS, LVPECL, and LVDS

− Inputs - 3.3V LVTTL/ LVCMOS

• Programmable Slew Rate Control

• Programmable Loop Bandwidth Settings

• Programmable output inversion to reduce bimodal jitter

• Redundant clock inputs with glitchless auto and manual

switchover options

TheIDT5V9888canbeprogrammedthroughtheuseoftheI²CorJTAG

interfaces. The programming interface enables the device to be pro-

grammedwhenitisinnormaloperationorwhatiscommonlyknownasin-

systemprogrammable. AninternalEEPROMallowstheusertosaveand

restore the configuration of the device without having to reprogram it on

power-up. JTAG boundary scan is also implemented.

Each of the three PLLs has an 8-bit pre-scaler and a 12-bit feedback

divider. Thisallowstheusertogeneratethreeuniquenon-integer-related

frequencies. The PLL loop bandwidth is programmable to allow the user

totailorthePLLresponsetotheapplication. Forinstance,theusercantune

the PLL parameters to minimize jitter generation or to maximize jitter

attenuation. Spread spectrum generation and fractional divides are

allowed on two of the PLLs.

Thereare10-bitpostdividersonfiveofthesixoutputbanks. Twoofthe

six output banks are configurable to be LVTTL, LVPECL, or LVDS. The

otherfouroutputbanksareLVTTL. TheoutputsareconnectedtothePLLs

via the switch matrix. The switch matrix allows the user to route the PLL

outputstoanyoutputbank. Thisfeaturecanbeusedtosimplifyandoptimize

the board layout. In addition, each output's slew rate and enable/disable

function can be programmed.

• JTAG Boundary Scan

• Individual output enable/disable

• Power-down mode

• 3.3VVDD

• Available in TQFP and VFQFPN packages

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

OCTOBER 2007

2007 Integrated Device Technology, Inc.

DSC 7044/13

12 3 4 5 6 7...37

中文翻译

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与IDT5V9888PFGI相关器件

型号	品牌	获取价格	描述	数据表
IDT5V9888PFGI8	IDT	获取价格	Clock Generator, 500MHz, PQFP32, GREEN, TQFP-32
IDT5V9910A	IDT	获取价格	3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR
IDT5V9910A-2SO	IDT	获取价格	3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR
IDT5V9910A-2SO8	IDT	获取价格	PLL Based Clock Driver, 5V Series, 8 True Output(s), 0 Inverted Output(s), PDSO24, 0.300 I
IDT5V9910A-2SOC	ETC	获取价格	EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER\|SOP\|24PIN\|PLASTIC
IDT5V9910A-2SOG	IDT	获取价格	PLL Based Clock Driver, 5V Series, 8 True Output(s), 0 Inverted Output(s), PDSO24, 0.300 I
IDT5V9910A-2SOI	IDT	获取价格	3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR
IDT5V9910A-5SO	IDT	获取价格	3.3V LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR
IDT5V9910A-5SOG	IDT	获取价格	PLL Based Clock Driver, 5V Series, 8 True Output(s), 0 Inverted Output(s), PDSO24, 0.300 I
IDT5V9910A-5SOGI8	IDT	获取价格	PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO24, 0.300 INCH, SOIC-2

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