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ICS85356AGILF PDF预览

ICS85356AGILF

更新时间: 2024-09-16 20:33:35
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 1109K
描述
Low Skew Clock Driver, 85356 Series, 2 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20

ICS85356AGILF 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.5
Is Samacsys:N系列:85356
输入调节:DIFFERENTIAL MUXJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:1
功能数量:2反相输出次数:
端子数量:20实输出次数:2
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V传播延迟(tpd):1.45 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.15 ns
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

ICS85356AGILF 数据手册

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2:1, Differential-to-3.3V Dual LVPECL/ECL  
Clock Multiplexer  
ICS85356I  
DATA SHEET  
General Description  
Features  
The ICS85356I is a dual 2:1 Differential-to-LVPECL  
Multiplexer. The device has both common select and  
individual select inputs. When COM_SEL is logic High,  
the CLKxx input pairs will be passed to the output.  
When COM_SEL is logic Low, the output is  
High speed differential muliplexer. The device can be configured  
as a 2:1 multiplexer  
S
IC  
HiPerClockS™  
Dual 3.3V LVPECL outputs  
Selectable differential CLKx/nCLKx input pairs  
Differential CLKx/nCLKx pairs can accept the following interface  
determined by the setting of the SEL0 pin for channel 0 and the  
SEL1 pin for Channel 1.  
levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL  
Output frequency: 900MHz (typical)  
The differential input has a common mode range that can accept  
most differential input types such as LVPECL, LVDS, LVHSTL,  
SSTL, and HCSL. The ICS85356I can therefore be used as a  
differential translator to translate almost any differential input type to  
LVPECL. It can also be used in ECL mode by setting VCC = 0V and  
Translates any single-ended input signal to 3.3V LVPECL levels  
with resistor bias on nCLKx input  
Output skew: 75ps (typical)  
Propagation delay: 1.15ns (typical)  
V
EE to -3.0V to - 3.8V.  
LVPECL mode operating voltage supply range:  
VCC = 3V to 3.8V, VEE = 0V  
The ICS85356I adds negligible jitter to the input clock and can  
operate at high frequencies in excess of 900MHz thus making  
it ideal for use in demanding applications such as SONET,  
Fibre Channel, 1 Gigabit/10 Gigabit Ethernet.  
ECL mode operating voltage supply range:  
VCC = 0V, VEE = -3V to -3.8V  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Block Diagram  
Pin Assignment  
Pulldown  
CLK0A  
CLK0A  
nCLK0A  
nc  
1
2
20  
19  
VCC  
Q0  
0
Pullup  
nCLK0A  
Q0  
3
4
18  
17  
nQ0  
SEL0  
Pulldown  
Pullup  
CLK0B  
CLK0B  
nQ0  
CLK0B  
1
nCLK0B  
CLK1A  
nCLK1A  
5
6
7
16 COM_SEL  
15  
14  
13  
SEL1  
VCC  
Pullup  
SEL0  
COM_SEL  
SEL1  
Q1  
nc  
CLK1B  
nCLK1B  
8
Pulldown  
Pullup  
9
10  
12 nQ1  
11  
VEE  
ICS85356I  
Pulldown  
Pullup  
CLK1A  
0
1
nCLK1A  
20-Lead SOIC  
7.5mm x 12.8mm x 2.3mm package body  
M Package  
Q1  
Pulldown  
Pullup  
CLK1B  
CLK1B  
nQ1  
Top View  
ICS85356I  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm package body  
G Package  
Top View  
ICS85356AMI REVISION B MAY 10, 2010  
1
©2010 Integrated Device Technology, Inc.  

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