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ICS8531AY PDF预览

ICS8531AY

更新时间: 2024-11-05 19:44:03
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
8页 124K
描述
Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), ECL, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LQFP-32

ICS8531AY 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.23输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQFP-G32JESD-609代码:e0
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:32实输出次数:9
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):2 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.05 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:ECL
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mm最小 fmax:500 MHz
Base Number Matches:1

ICS8531AY 数据手册

 浏览型号ICS8531AY的Datasheet PDF文件第2页浏览型号ICS8531AY的Datasheet PDF文件第3页浏览型号ICS8531AY的Datasheet PDF文件第4页浏览型号ICS8531AY的Datasheet PDF文件第5页浏览型号ICS8531AY的Datasheet PDF文件第6页浏览型号ICS8531AY的Datasheet PDF文件第7页 
Integrated  
Circuit  
Systems, Inc.  
ICS8531-01  
LOW SKEW 1-TO-9  
3.3V PECL FANOUT BUFFER  
GENERAL DESCRIPTION  
FEATURES  
The ICS8531-01 is a very low skew, 1-to-9 9 LVPECLoutputs  
,&6  
3.3V PECL Fanout Buffer and a member of the  
Selectable differential HSTL or PECL clock inputs  
HiPerClockS™  
HiPerClockS™ family of High Performance  
Clock Solutions from ICS. The ICS8531-01  
has selectable clock inputs that accept either  
Output frequency up to 500MHz  
tsk(o) = 50ps  
HSTL or PECL input levels. The output enable is synchro-  
nous which eliminates the runt clock pulses which occur dur-  
ing asynchronous enabling and disabling of the outputs.  
tsk(pp) = 250ps  
3.3V operating supply voltages  
Guaranteed output skew and part-to-part skew characteris-  
tics make the ICS8531-01 ideal for high performance work-  
station and server applications.  
32 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm  
package body, 0.8mm package lead pitch  
0°C to 70°C ambient operating temperature  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
nD  
LE  
OE  
Q
32 31 30 29 28 27 26 25  
HCLK  
nHCLK  
PCLK  
0
1
Q0  
nQ0  
VCCI  
HCLK  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
VCCO  
Q3  
nPCLK  
Q1  
nQ1  
nHCLK  
CLK_SEL  
PCLK  
nQ3  
Q4  
CLK_SEL  
ICS8531-01  
nQ4  
Q5  
Q2  
nQ2  
nPCLK  
VEE  
nQ5  
VCCO  
Q3  
nQ3  
OE  
9 10 11 12 13 14 15 16  
Q4  
nQ4  
Q5  
nQ5  
Q6  
nQ6  
32-Lead LQFP  
Y Package  
Top View  
Q7  
nQ7  
Q8  
nQ8  
8531-01  
www.icst.com  
REV.A- OCTOBER 2, 2000  
1

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