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ICS8531AY-1-LF PDF预览

ICS8531AY-1-LF

更新时间: 2024-11-05 19:20:07
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
15页 191K
描述
Low Skew Clock Driver, 8531 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32

ICS8531AY-1-LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.17系列:8531
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:32
实输出次数:9最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):260
传播延迟(tpd):2 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.05 ns座面最大高度:1.6 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:7 mmBase Number Matches:1

ICS8531AY-1-LF 数据手册

 浏览型号ICS8531AY-1-LF的Datasheet PDF文件第2页浏览型号ICS8531AY-1-LF的Datasheet PDF文件第3页浏览型号ICS8531AY-1-LF的Datasheet PDF文件第4页浏览型号ICS8531AY-1-LF的Datasheet PDF文件第5页浏览型号ICS8531AY-1-LF的Datasheet PDF文件第6页浏览型号ICS8531AY-1-LF的Datasheet PDF文件第7页 
ICS8531-01  
LOW SKEW, 1-TO-9  
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS8531-01 is a low skew, high performance 9 differential 3.3V LVPECL outputs  
ICS  
1-to-9 Differential-to-3.3V LVPECL Fanout Buffer  
Selectable differential CLK, nCLK or LVPECL clock inputs  
HiPerClockS™  
and a member of the HiPerClockSfamily of High  
Performance Clock Solutions from ICS. The  
ICS8531-01 has two selectable clock inputs.The  
CLK, nCLK pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL  
CLK, nCLK pair can accept most standard differential input  
levels. The PCLK, nPCLK pair can accept LVPECL, CML, or  
SSTL input levels.The clock enable is internally synchronized  
to eliminate runt pulses on the outputs during asynchronous  
assertion/deassertion of the clock enable pin.  
PCLK, nPCLK supports the following input types:  
LVPECL, CML, SSTL  
Maximum output frequency: 500MHz  
Translates any single ended input signal (LVCMOS, LVTTL,  
GTL) to 3.3V LVPECL levels with resistor bias on nCLK input  
Guaranteed output skew and part-to-part skew characteristics  
make the ICS8531-01 ideal for high performance workstation  
and server applications.  
Output skew: 50ps (maximum)  
Part-to-part skew: 250ps (maximum)  
Propagation delay: 2ns (maximum)  
3.3V operating supply  
0°C to 70°C ambient operating temperature  
Lead-Free package available  
Industrial temperature information available upon request  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
D
CLK_EN  
Q
32 31 30 29 28 27 26 25  
LE  
CLK  
nCLK  
PCLK  
0
1
VCC  
CLK  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
VCCO  
Q3  
Q0  
nQ0  
nPCLK  
nCLK  
nQ3  
Q4  
Q1  
nQ1  
CLK_SEL  
PCLK  
CLK_SEL  
ICS8531-01  
nQ4  
Q5  
Q2  
nQ2  
nPCLK  
VEE  
nQ5  
VCCO  
Q3  
nQ3  
CLK_EN  
9 10 11 12 13 14 15 16  
Q4  
nQ4  
Q5  
nQ5  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
Q6  
nQ6  
Y package  
TopView  
Q7  
nQ7  
Q8  
nQ8  
8531AY-01  
www.icst.com/products/hiperclocks.html  
REV. C OCTOBER 15, 2004  
1

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