Datasheet > ICS508MT

ICS508MT

更新时间： 2024-10-31 22:36:35

品牌	Logo	应用领域
矽成 - ICSI		转换器锁存器接口集成电路光电二极管
页数	文件大小	规格书
5页	53K
描述
PECL to CMOS Converter

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ICS508MT 数据手册

PRELIMINARY INFORMATION

ICS508

PECL to CMOS Converter

Description

Features

The ICS508 is the most cost effective way to

generate a high quality, high frequency CMOS

clock output from a PECL clock input.

• Packaged as 8 pin SOIC or die

• Separate VDD supplies allow voltage

translation

The ICS508 has separate VDD supplies for the

PECL input buffer and the output buffer allowing

different voltages to be used. For example, the

input clock could use a 3.3 V supply while the

output operates from 2.5 V.

• Clock frequency of 0 - 250 MHz

• Duty cycle of 45/55

• Operating voltages of 2.375 to 5.5 V

• Tri-state output for board level testing

• 24 mA drive capability

The device has an Output Enable pin that tri-states

the clock output when the OE pin is taken low.

• Industrial temperature version available

• Advanced, low power CMOS process

The ICS508 is a member of the ClockBlocks™

family of devices.

Block Diagram

VDDP

VDDC

PECLIN

Output

CLK

Buffer

GND

MDS 508 C

Revision 012400

Printed 11/13/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com

12 3 4 5

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