Datasheet > ICS513MT

ICS513MT

更新时间： 2024-09-09 22:48:19

品牌	Logo	应用领域
矽成 - ICSI		晶体时钟发生器外围集成电路光电二极管
页数	文件大小	规格书
4页	65K
描述
LOCO⑩ PLL Clock Generator

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ICS513MT 数据手册

ICS513

LOCO™ PLL Clock Generator

Description

Features

• Packaged as 8 pin SOIC

The ICS513 LOCO™ is the most cost effective

way to generate a high quality, high frequency

clock output from a 14.31818 MHz crystal or

clock input. The name LOCO stands for LOw

Cost Oscillator, as it is designed to replace crystal

oscillators in many electronic systems. Using

Phase-Locked-Loop (PLL) techniques, the device

uses a standard, inexpensive crystal to produce

output clocks up to 100 MHz.

• ICS’ lowest cost PLL clock plus reference

• Produces common computer frequencies

• Input crystal frequency typically 14.3182 MHz

• Output clock frequencies up to 100 MHz

• Low jitter - 40 ps one sigma

• Compatible with all popular CPUs

• Duty cycle of 45/55

Stored in the chip’s ROM is the ability to generate

5 different output frequencies, allowing one chip

to work in different speed processor systems.

• Custom frequencies available

• Operating voltages of 3.0 to 5.5 V

• Power down mode turns off chip

• 25mA drive capability at TTL levels

• Advanced, low power CMOS process

The device also has a power down mode that turns

off the clock outputs when both select pins are low.

In this mode, the internal PLL is not running.

Block Diagram

VDD GND

Output

Buffer

S1, S0

PLL

CLK

Clock

Synthesis

and Control

Circuitry

14.31818 MHz

crystal

or clock

X1/ICLK

Crystal

Oscillator

Output

Buffer

REF

Optional crystal capacitors

MDS 513 B

Revision 080699

Printed 12/4/00

Integrated Circuit Systems • 525 Race Street • San Jose • CA• 95126 • (408)295-9800tel• (408)295-9818fax

12 3 4

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