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IBM25PPC405GP-3BE200CZ PDF预览

IBM25PPC405GP-3BE200CZ

更新时间: 2024-10-28 14:30:39
品牌 Logo 应用领域
国际商业机器公司 - IBM 时钟外围集成电路
页数 文件大小 规格书
60页 1410K
描述
32-BIT, 200MHz, RISC PROCESSOR, PBGA456, 35 MM, PLASTIC, BGA-456

IBM25PPC405GP-3BE200CZ 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:BGA,针数:456
Reach Compliance Code:unknown风险等级:5.71
地址总线宽度:32位大小:32
边界扫描:YES最大时钟频率:66.66 MHz
外部数据总线宽度:32格式:FIXED POINT
集成缓存:YESJESD-30 代码:S-PBGA-B456
长度:35 mm低功率模式:YES
端子数量:456最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY认证状态:Not Qualified
座面最大高度:2.65 mm速度:200 MHz
最大供电电压:2.7 V最小供电电压:2.3 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:35 mm
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISCBase Number Matches:1

IBM25PPC405GP-3BE200CZ 数据手册

 浏览型号IBM25PPC405GP-3BE200CZ的Datasheet PDF文件第2页浏览型号IBM25PPC405GP-3BE200CZ的Datasheet PDF文件第3页浏览型号IBM25PPC405GP-3BE200CZ的Datasheet PDF文件第4页浏览型号IBM25PPC405GP-3BE200CZ的Datasheet PDF文件第5页浏览型号IBM25PPC405GP-3BE200CZ的Datasheet PDF文件第6页浏览型号IBM25PPC405GP-3BE200CZ的Datasheet PDF文件第7页 
PowerPC 405GP Embedded Processor Data Sheet  
Features  
• IBM PowerPC405 32-bit RISC processor core  
operating up to 266MHz  
• PCI Revision 2.2 compliant interface (32-bit, up  
to 66MHz)  
- Synchronous or asynchronous PCI Bus  
interface  
• Synchronous DRAM (SDRAM) interface  
operating up to 133MHz  
- Internal or external PCI Bus Arbiter  
- 32-bit interface for non-ECC applications  
• Ethernet 10/100Mbps (full-duplex) support with  
media independent interface (MII)  
- 40-bit interface serves 32 bits of data plus 8  
check bits for ECC applications  
• Programmable interrupt controller supports  
seven external and 19 internal edge triggered or  
level-sensitive interrupts  
4KB on-chip memory (OCM)  
• External peripheral bus  
- Flash ROM/Boot ROM interface  
• Programmable timers  
- Direct support for 8-, 16-, or 32-bit SRAM  
and external peripherals  
• Two serial ports (16550 compatible UART)  
• One IIC interface  
- Up to eight devices  
• General purpose I/O (GPIO) available  
• Supports JTAG for board level testing  
- External Mastering supported  
• DMA support for external peripherals, internal  
UART and memory  
• Internal processor local Bus (PLB) runs at  
SDRAM interface frequency  
- Scatter-gather chaining supported  
- Four channels  
• Supports PowerPC processor boot from PCI  
memory  
Description  
Designed specifically to address embedded  
applications, the PowerPC 405GP (PPC405GP)  
provides a high-performance, low-power solution  
that interfaces to a wide range of peripherals by  
incorporating on-chip power management features  
and lower power dissipation requirements.  
support, serial ports, IIC interface, and general  
purpose I/O.  
Technology: IBM CMOS SA-12E, 0.25 µm  
(0.18 µm Leff)  
Package: 456-ball (35mm or 27mm), or 413-ball  
(25mm) enhanced plastic ball grid array (E-PBGA)  
This chip contains a high-performance RISC  
processor core, SDRAM controller, PCI bus  
interface, Ethernet interface, control for external  
ROM and peripherals, DMA with scatter-gather  
Power (typical): TBDW at 133MHz, 1.5W at  
200MHz, 2W at 266MHz  
Page 1 of 60  
6/20/03  

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