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IBM25PPC405GP-3BE266C PDF预览

IBM25PPC405GP-3BE266C

更新时间: 2024-02-07 22:14:19
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
58页 1218K
描述
MICROPROCESSOR|32-BIT|CMOS|BGA|456PIN|PLASTIC

IBM25PPC405GP-3BE266C 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:BGA, BGA456,26X26,50针数:456
Reach Compliance Code:unknownECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.72
其他特性:ALSO REQUIRES 3.3V SUPPLY地址总线宽度:32
位大小:32边界扫描:YES
最大时钟频率:66.66 MHz外部数据总线宽度:32
格式:FIXED POINT集成缓存:YES
JESD-30 代码:S-PBGA-B456长度:35 mm
低功率模式:YES端子数量:456
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA456,26X26,50封装形状:SQUARE
封装形式:GRID ARRAY电源:2.5,3.3 V
认证状态:Not Qualified座面最大高度:2.65 mm
速度:266.66 MHz子类别:Microprocessors
最大供电电压:2.7 V最小供电电压:2.3 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:35 mm
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISCBase Number Matches:1

IBM25PPC405GP-3BE266C 数据手册

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PowerPC 405GP Embedded Processor Data Sheet  
Features  
• IBM PowerPC405 32-bit RISC processor core  
to 66MHz)  
operating up to 266MHz  
- Synchronous or asynchronous PCI Bus  
interface  
• PC-133 synchronous DRAM (SDRAM) interface  
- 32-bit interface for non-ECC applications  
- Use internal or external PCI Bus Arbiter  
• Ethernet 10/100Mbps (full-duplex) support with  
media independent interface (MII)  
- 40-bit interface serves 32 bits of data plus 8  
check bits for ECC applications  
• Programmable interrupt controller supports  
seven external and 19 internal edge triggered or  
level-sensitive interrupts  
4KB on-chip memory (OCM)  
• External peripheral bus  
- Flash ROM/Boot ROM interface  
• Programmable timers  
- Direct support for 8-, 16-, or 32-bit SRAM  
and external peripherals  
• Two serial ports (16550 compatible UART)  
• One IIC interface  
- Up to eight devices  
• General purpose I/O (GPIO) available  
• Supports JTAG for board level testing  
- External Mastering supported  
• DMA support for external peripherals, internal  
UART and memory  
• Internal processor local Bus (PLB) runs at  
SDRAM interface frequency  
- Scatter-gather chaining supported  
- Four channels  
• Supports PowerPC processor boot from PCI  
memory  
• PCI Revision 2.2 compliant interface (32-bit, up  
Description  
Designed specifically to address embedded  
applications, the PowerPC 405GP (PPC405GP)  
provides a high-performance, low-power solution  
that interfaces to a wide range of peripherals by  
incorporating on-chip power management features  
and lower power dissipation requirements.  
support, serial ports, IIC interface, and general  
purpose I/O.  
Technology: IBM CMOS SA-12E, 0.25 µm  
(0.18 µm Leff)  
Package: 456-ball (35mm or 27mm), or 413-ball  
(25mm) enhanced plastic ball grid array (E-PBGA)  
This chip contains a high-performance RISC  
processor core, SDRAM controller, PCI bus  
interface, Ethernet interface, control for external  
ROM and peripherals, DMA with scatter-gather  
Power (typical): 1.5W at 200MHz, 2W at 266MHz  
While the information contained herein is believed to be accurate, such information is preliminary, and should not be  
relied upon for accuracy or completeness, and no representations or warranties of accuracy or completeness are made.  
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