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IBM25PPC405GP-3DD200C PDF预览

IBM25PPC405GP-3DD200C

更新时间: 2024-10-28 15:42:15
品牌 Logo 应用领域
国际商业机器公司 - IBM 时钟外围集成电路
页数 文件大小 规格书
58页 878K
描述
RISC Microprocessor, 32-Bit, 200MHz, CMOS, PBGA456, 27 MM, PLASTIC, BGA-456

IBM25PPC405GP-3DD200C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:HBGA, BGA456,26X26,40
针数:456Reach Compliance Code:unknown
风险等级:5.75其他特性:SEATED HGT-NOM
地址总线宽度:位大小:32
边界扫描:YES最大时钟频率:66.6 MHz
外部数据总线宽度:格式:FIXED POINT
集成缓存:YESJESD-30 代码:S-PBGA-B456
JESD-609代码:e0长度:27 mm
低功率模式:YES端子数量:456
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HBGA
封装等效代码:BGA456,26X26,40封装形状:SQUARE
封装形式:GRID ARRAY, HEAT SINK/SLUG电源:2.5,3.3 V
认证状态:Not Qualified座面最大高度:2.21 mm
速度:200 MHz子类别:Microprocessors
最大供电电压:2.7 V最小供电电压:2.3 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
宽度:27 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

IBM25PPC405GP-3DD200C 数据手册

 浏览型号IBM25PPC405GP-3DD200C的Datasheet PDF文件第2页浏览型号IBM25PPC405GP-3DD200C的Datasheet PDF文件第3页浏览型号IBM25PPC405GP-3DD200C的Datasheet PDF文件第4页浏览型号IBM25PPC405GP-3DD200C的Datasheet PDF文件第5页浏览型号IBM25PPC405GP-3DD200C的Datasheet PDF文件第6页浏览型号IBM25PPC405GP-3DD200C的Datasheet PDF文件第7页 
PowerPC 405GP Embedded Processor Data Sheet  
Features  
TM  
- Internal PCI Bus Arbiter which can be  
• IBM PowerPC 405 32-bit RISC processor  
core operating up to 266 MHz  
disabled for use with an external arbiter  
• Ethernet 10/100Mbps (full-duplex) support with  
Medium Independent Interface (MII)  
• PC-100 Synchronous DRAM (SDRAM)  
interface operating up to 133 MHz  
• Programmable Interrupt Controller supports  
interrupts from a variety of sources  
- 32-bit interface for non-ECC applications  
- 40-bit interface serves 32 bits of data plus 8  
check bits for ECC applications  
- Seven external and 19 internal  
- Edge triggered or level-sensitive  
- Positive or negative active  
• 4KB On-chip Memory (OCM)  
• External Peripheral Bus  
- Non-critical or critical interrupt to processor  
core  
- Flash ROM/Boot ROM interface  
- Direct support for 8-, 16-, or 32-bit SRAM  
and external peripherals  
- Programmable critical interrupt priority  
ordering  
- Up to eight devices  
- Programmable critical interrupt vector for  
faster vector processing  
- External Mastering supported  
• DMA support for external peripherals, internal  
UART and memory  
• Programmable Timers  
Two serial ports (16550 compatible UART)  
- Scatter-gather chaining supported  
- Four channels  
2
• One IIC (I C) interface  
• General Purpose I/O (GPIO) available  
• Supports JTAG for board level testing  
• PCI Revision 2.2 Compliant Interface (32-bit, up  
to 66MHz)  
- PCI Bus interface can be configured to  
operate synchronously or asynchronously  
to the chip input clock  
• Internal Processor Local Bus (PLB) runs at  
SDRAM interface frequency  
• Supports PowerPC processor boot from PCI  
memory  
Description  
Designed specifically to address embedded  
applications, the PowerPC 405GP (PPC405GP)  
provides a high-performance, low-power solution  
that interfaces to a wide range of peripherals by  
incorporating on-chip power management features  
and intrinsically lower power dissipation  
requirements.  
ROM and peripherals, DMA with scatter-gather  
support, serial ports, IIC interface, and general  
purpose I/O.  
Technology: IBM CMOS SA12E 0.25 µm  
(0.18 µm L )  
eff  
Package: 456-ball (35mm or 27mm), or 413-ball  
(25mm) enhanced plastic ball grid array (E-PBGA)  
This chip contains a high-performance RISC  
processor core, SDRAM controller, PCI bus  
interface, Ethernet interface, control for external  
Power (estimated): Typical 1.5W, Maximum 2.0W  
While the information contained herein is believed to be accurate, such information is preliminary, and should not be  
relied upon for accuracy or completeness, and no representations or warranties of accuracy or completeness are made  
1

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