Datasheet > HYMD216646L6-L

HYMD216646L6-L

更新时间： 2024-11-10 23:57:31

品牌	Logo	应用领域
其他 - ETC		动态存储器双倍数据速率
页数	文件大小	规格书
16页	245K
描述
SDRAM\|DDR\|16MX64\|CMOS\|DIMM\|184PIN\|PLASTIC

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中文翻译

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HYMD216646L6-L 数据手册

16Mx64 bits

Unbuffered DDR SDRAM DIMM

HYMD216646(L)6-K/H/L

DESCRIPTION

Hynix HYMD216646(L)6-K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory

Modules (DIMMs) which are organized as 16Mx64 high-speed memory arrays. Hynix HYMD216646(L)6-K/H/L series

consists of four 16Mx16 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix

HMD216646(L)6-K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry stan-

dard. It is suitable for easy interchange and addition.

Hynix HYMD216646(L)6-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous opera-

tions referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are

latched hed on the rising edges of the clock, Data, Data strobes(UDQS/LDQS) and Write data masks(UDM/LDM)

inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched

to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2. High speed frequen-

cies, programmable latencies and burst lengths allow variety of device operation in high performance memory system.

Hynix HYMD216646(L)6-K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is

implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify

DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

FEATURES

•

128MB (16M x 64) Unbuffered DDR DIMM based on

16Mx16 DDR SDRAM

•

Data inputs on DQS centers when write (centered

DQ)

•

JEDEC Standard 184-pin dual in-line memory module

(DIMM)

Data strobes synchronized with output data for read

and input data for write

•

2.5V +/- 0.2V VDD and VDDQ Power supply

•

Programmable CAS Latency 2 / 2.5 supported

All inputs and outputs are compatible with SSTL_2

interface

Programmable Burst Length 2 / 4 / 8 with both

sequential and interleave mode

•

Fully differential clock operations (CK & /CK) with

100MHz/125MHz/133MHz

•

tRAS Lock-out function supported

Internal four bank operations with single pulsed RAS

Auto refresh and self refresh supported

8192 refresh cycles / 64ms

All addresses and control inputs except Data, Data

strobes and Data masks latched on the rising edges

of the clock

•

Data(DQ), Data strobes and Write masks latched on

both rising and falling edges of the clock

ORDERING INFORMATION

Part No.

Power Supply

Clock Frequency

Interface

Form Factor

HYMD216646(L)6-K

HYMD216646(L)6-H

HYMD216646(L)6-L

133MHz (*DDR266A)

133MHz (*DDR266B)

100MHz (*DDR200)

VDD=2.5V

VDDQ=2.5V

184pin Unbuffered DIMM

5.25 x 1.25 x 0.15 inch

SSTL_2

* JEDEC Defined Specifications compliant

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.5/May. 02

12 3 4 5 6 7...16

中文翻译

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与HYMD216646L6-L相关器件

型号	品牌	获取价格	描述	数据表
HYMD216726A6	ETC	获取价格	16Mx72\|2.5V\|M/K/H/L\|x5\|DDR SDRAM - Unbuffered DIMM 128MB
HYMD216726A6-H	HYNIX	获取价格	Unbuffered DDR SO-DIMM
HYMD216726A6J	ETC	获取价格	16Mx72\|2.5V\|J\|x5\|DDR SDRAM - Unbuffered DIMM 128MB
HYMD216726A6J-J	HYNIX	获取价格	Unbuffered DDR SO-DIMM
HYMD216726A6-K	HYNIX	获取价格	Unbuffered DDR SO-DIMM
HYMD216726A6-L	HYNIX	获取价格	Unbuffered DDR SO-DIMM
HYMD216726A6-M	HYNIX	获取价格	Unbuffered DDR SO-DIMM
HYMD216726AL6	ETC	获取价格	16Mx72\|2.5V\|M/K/H/L\|x5\|DDR SDRAM - Unbuffered DIMM 128MB
HYMD216726AL6-H	HYNIX	获取价格	Unbuffered DDR SO-DIMM
HYMD216726AL6J	ETC	获取价格	16Mx72\|2.5V\|J\|x5\|DDR SDRAM - Unbuffered DIMM 128MB

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