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HYMD216646C6J-J PDF预览

HYMD216646C6J-J

更新时间: 2024-11-11 05:37:15
品牌 Logo 应用领域
海力士 - HYNIX 动态存储器双倍数据速率
页数 文件大小 规格书
18页 169K
描述
Unbuffered DDR SDRAM DIMM

HYMD216646C6J-J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIMM包装说明:DIMM, DIMM184
针数:184Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.32
风险等级:5.73访问模式:SINGLE BANK PAGE BURST
最长访问时间:0.7 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):166 MHzI/O 类型:COMMON
JESD-30 代码:R-XDMA-N184内存密度:1073741824 bit
内存集成电路类型:DDR DRAM MODULE内存宽度:64
湿度敏感等级:1功能数量:1
端口数量:1端子数量:184
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16MX64
输出特性:3-STATE封装主体材料:UNSPECIFIED
封装代码:DIMM封装等效代码:DIMM184
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度):225电源:2.5 V
认证状态:Not Qualified刷新周期:8192
自我刷新:YES子类别:DRAMs
最大压摆率:1.34 mA最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

HYMD216646C6J-J 数据手册

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16Mx64 bits  
Unbuffered DDR SDRAM DIMM  
HYMD216646C6J-D4/D43/J  
DESCRIPTION  
PRELIMINARY  
Hynix HYMD216646C6J-D4/D43/J series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Lin  
Memory Modules (DIMMs) which are organized as 16Mx64 high-speed memory arrays. Hynix HYMD216646C6J-D4/  
D43/J series consists of four 16Mx16 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate.  
Hynix HMD216646C6J-D4/D43/J series provide a high performance 8-byte interface in 5.25" width form factor of  
industry standard. It is suitable for easy interchange and addition.  
Hynix HYMD216646C6J-D4/D43/J series is designed for high speed of up to 200MHz and offers fully synchronous  
operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs  
are latched hed on the rising edges of the clock, Data, Data strobes(UDQS/LDQS) and Write data masks(UDM/LDM)  
inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to  
achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2. High speed frequencies,  
programmable latencies and burst lengths allow variety of device operation in high performance memory system.  
Hynix HYMD216646C6J-D4/D43/J series incorporates SPD(serial presence detect). Serial presence detect function is  
implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify  
DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.  
FEATURES  
128MB (16M x 64) Unbuffered DDR DIMM based on  
16Mx16 DDR SDRAM  
Data inputs on DQS centers when write (centered  
DQ)  
JEDEC Standard 184-pin dual in-line memory mod-  
ule (DIMM)  
Data strobes synchronized with output data for read  
and input data for write  
2.5V +/- 0.2V VDD and VDDQ Power supply  
Programmable CAS Latency 2 / 2.5 / 3 supported  
All inputs and outputs are compatible with SSTL_2  
interface  
Programmable Burst Length 2 / 4 / 8 with both  
sequential and interleave mode  
Fully differential clock operations (CK & /CK) with  
125MHz/133MHz/166MHz/200MHz  
tRAS Lock-out function supported  
Internal four bank operations with single pulsed RAS  
Auto refresh and self refresh supported  
8192 refresh cycles / 64ms  
All addresses and control inputs except Data, Data  
strobes and Data masks latched on the rising edges  
of the clock  
Data(DQ), Data strobes and Write masks latched on  
both rising and falling edges of the clock  
ORDERING INFORMATION  
Part No.  
Power Supply  
Clock Frequency  
Interface  
Form Factor  
184pin Unbuffered DIMM  
5.25 x 1.25 x 0.15 inch  
HYMD216646C6J-J  
VDD=VDDQ=2.5V  
VDD=VDDQ=2.6V  
VDD=VDDQ=2.6V  
166MHz (DDR333)  
SSTL_2  
184pin Unbuffered DIMM  
5.25 x 1.25 x 0.15 inch  
HYMD216646C6J-D4  
HYMD216646C6J-D43  
200MHz (DDR400)  
200MHz (DDR400)  
SSTL_2  
SSTL_2  
184pin Unbuffered DIMM  
5.25 x 1.25 x 0.15 inch  
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any  
responsibility for use of circuits described. No patent licenses are implied.  
Rev. 0.3 / Aug. 2003  
1

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