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HY57V641620ESTP-7 PDF预览

HY57V641620ESTP-7

更新时间: 2024-12-01 11:01:23
品牌 Logo 应用领域
海力士 - HYNIX 动态存储器
页数 文件大小 规格书
13页 116K
描述
64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O

HY57V641620ESTP-7 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP54,.46,32
针数:54Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.82访问模式:FOUR BANK PAGE BURST
最长访问时间:5.4 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):143 MHzI/O 类型:COMMON
交错的突发长度:1,2,4,8JESD-30 代码:R-PDSO-G54
JESD-609代码:e6长度:22.238 mm
内存密度:67108864 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:16功能数量:1
端口数量:1端子数量:54
字数:4194304 words字数代码:4000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:4MX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP54,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified刷新周期:4096
座面最大高度:1.194 mm自我刷新:YES
连续突发长度:1,2,4,8,FP最大待机电流:0.002 A
子类别:DRAMs最大压摆率:0.18 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Bismuth (Sn/Bi)端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:10.16 mm
Base Number Matches:1

HY57V641620ESTP-7 数据手册

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64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O  
Document Title  
4Bank x 1M x 16bits Synchronous DRAM  
Revision History  
Revision No.  
History  
Draft Date  
Remark  
First Version Release  
1.0  
Nov. 2004  
1. Changed tOH: 2.0 --> 2.5  
[tCK = 7 & 7.5 (CL3) Product]  
1. Changed Input High/Low Voltage (Page 08)  
2. Changed DC characteristics (Page 09)  
- IDD2NS: 18mA -> 15mA  
- IDD5:210 / 195 / 180mA -> 170 / 160 / 150mA  
[Speed 200 / 166 / 143 / 133MHz]  
3. Changed Clock High / Low pulse width Time (Page 11)  
4. Changed tAC Time (Page11)  
1.1  
1.2  
Dec. 2004  
Dec. 2004  
5. Changed tRRD Time (Page12)  
1. Corrected Revision No.: 2.0 -> 1.1  
2. Deleted Remark at Revision History  
3. Corrected AC OPERATING CONDITION  
- CL 50pF -> 30pF  
4. Changed DC OPERATING CONDITION  
- VIH MAX VDDQ+2.0 -> VDDQ+0.3 and Typ 3.3 -> 3.0  
- VIL MIN VSSQ-2.0 -> -0.3  
1.3  
1.4  
1.5  
1. Modified note for Super Low Power in ORDERING INFORMATION  
1. Corrected PIN ASSIGNMENT A12 to NC  
Jan. 2005  
Jan. 2005  
Feb. 2005  
1. Corrected comments for overshoot and undershoot  
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for  
use of circuits described. No patent licenses are implied.  
Rev. 1.5 / Feb. 2005  
1

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