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HY29F400AR-90 PDF预览

HY29F400AR-90

更新时间: 2024-09-17 05:10:11
品牌 Logo 应用领域
海力士 - HYNIX ISM频段光电二极管内存集成电路
页数 文件大小 规格书
43页 417K
描述
Flash, 512KX8, 90ns, PDSO48, REVERSE, TSOP-48

HY29F400AR-90 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:REVERSE, TSOP-48针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.84
最长访问时间:90 ns其他特性:MINIMUM 100K PROGRAM/ERASE CYCLE
备用内存宽度:16启动块:BOTTOM/TOP
JESD-30 代码:R-PDSO-G48JESD-609代码:e6
长度:18.4 mm内存密度:4194304 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1端子数量:48
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1-R
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN BISMUTH端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
类型:NOR TYPE宽度:12 mm
Base Number Matches:1

HY29F400AR-90 数据手册

 浏览型号HY29F400AR-90的Datasheet PDF文件第2页浏览型号HY29F400AR-90的Datasheet PDF文件第3页浏览型号HY29F400AR-90的Datasheet PDF文件第4页浏览型号HY29F400AR-90的Datasheet PDF文件第5页浏览型号HY29F400AR-90的Datasheet PDF文件第6页浏览型号HY29F400AR-90的Datasheet PDF文件第7页 
HY29F400A Series  
4 Megabit 5.0 volt-only Sector Erase Flash Memory  
KEY FEATURES  
Ready//Busy  
5.0 V± 10% Read, Program, and Erase  
Minimizes system-level power requirements  
High performance  
45 ns access time  
Compatible with JEDEC-Standard Commands  
-
RY//BY output pin for detection of programming  
or erase cycle completion  
-
/RESET  
Hardware pin resets the internal state machine  
to the read mode  
Internal Erase Algorithms  
-
-
-
Uses software commands, pinouts, and  
packages following industry standards for  
single power supply Flash memory  
-
Automatically erases a sector, any combination  
of sectors, or the entire chip  
Minimum 100,000 Program/Erase Cycles  
Sector Erase Architecture  
Internal Programming Algorithms  
-
Automatically programs and verifies data at a  
specified address.  
-
One 16 Kbytes, two 8 Kbytes, one 32 Kbytes,  
and seven 64 Kbytes (byte mode)  
Low Power Consumption  
-
Any combination of sectors can be erased  
concurrently; also supports full chip erase  
-
-
-
20 mA typical active read current for Byte Mode  
28 mA typical active read current for Word Mode  
30 mA typical program/erase current  
Erase Suspend/Resume  
-
Suspend a sector erase operation to allow a  
data read in a sector not being erased within  
the same device  
Sector Protection  
-
Hardware method disables any combination  
of sectors from a program or erase operation  
Boot Code Sector Architecture  
DESCRIPTION  
operations.  
The HY29F400A is an 4 Megabit, 5.0 volt-only CMOS  
Flash memory device organized as a 512 Kbytes of 8-  
bits each, or 256 Kbytes of 16 bits each. The device  
is offered in standard 44-pin PSOP and 48-pin  
TSOP packages. It is designed to be programmed  
and erased in-system with a 5.0 volt power-supply  
and can also be programmed in standard PROM  
programmers.  
The HY29F400A is programmed by executing the  
program command sequence. This will start the  
internal byte/word programming algorithm that  
automatically times the program pulse widths  
and also verifies proper cell margin. Erase is ac-  
complished by executing either the sector erase  
or chip erase command sequence. This will start  
the internal erasing algorithm that automatically  
times the erase pulse width and also verifies  
proper cell margin. No preprogramming is re-  
quired prior to execution of the internal erase al-  
gorithm. Sectors of the HY29F400A Flash  
memory array are electrically erased via Fowler-  
Nordheim tunneling. Bytes/words are pro-  
grammed one byte/word at a time using a hot  
electron injection mechanism.  
With access times of 45ns, 55ns, 70ns, 90 ns, 120  
ns and 150 ns, the HY29F400A has separate chip  
enable (/CE), write eable (/WE), and output enable (/  
OE) controls. Hyundai Flash memory devices re-  
liably store memory data even after 100,000 pro-  
gram/erase cycles.  
The HY29F400A is entirely pin and command set  
compatible with the JEDEC standard for 4Mega-  
bit Flash memory devices. Commands are writ-  
ten to the command register using standard mi-  
croprocessor write timings. Register contents  
serve as input to an internal state-machine that  
controls the erase and programming circuitry.  
Write cycles also internally latch addresses and  
data needed for the programming and erase  
The HY29F400A features a sector erase architec-  
ture. The device memory array is divided into one  
16 Kbytes, two 8 Kbytes, one 32 Kbytes, and  
seven 64 Kbytes. Sectors can be erased indi-  
vidually or in groups without affecting the data in  
other sectors. Multiple sector erase and full chip  
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits  
described. No patent licences are implied.  
Rev.03/Aug.97  
Hyundai Semiconductor  

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