Datasheet > HX324C11T3K2-8

HX324C11T3K2-8

更新时间： 2024-11-25 01:21:23

品牌	Logo	应用领域
其他 - ETC		双倍数据速率
页数	文件大小	规格书
2页	891K
描述
DDR3-2400 CL11 240-Pin DIMM Kit

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中文翻译

获取价格

数据手册

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HX324C11T3K2-8 数据手册

HX324C11T3K2/8

8GB (4GB 512M x 64-Bit x 2 pcs.)

DDR3-2400 CL11 240-Pin DIMM Kit

SPECIFICATIONS

CL(IDD)

11 cycles

Row Cycle Time (tRCmin)

48.125ns (min.)

260ns (min.)

Refresh to Active/Refresh

Command Time (tRFCmin)

Row Active Time (tRASmin)

Maximum Operating Power

UL Rating

35ns (min.)

TBD W* (per module)

94 V - 0

Operating Temperature

Storage Temperature

0^oC to 85^oC

-55^oC to +100^oC

*Power will vary depending on the SDRAM used.

DESCRIPTION

FEATURES

HyperX HX324C11T3K2/8 is a kit of two 512M x 64-bit (4GB)

DDR3-2400 CL11 SDRAM (Synchronous DRAM), 1Rx8

memory modules, based on eight 512M x 8-bit FBGA

components per module. Each module kit supports Intel®

XMP (Extreme Memory Profiles). Total kit capacity is 8GB.

Each module kit has been tested to run at DDR3-2400 at a

low latency timing of 11-13-14 at 1.65V. The SPDs are

programmed to JEDEC standard latency DDR3-1600 timing of

11-11-11 at 1.5V. Each 240-pin DIMM uses gold contact

fingers. The JEDEC standard electrical and mechanical

specifications are as follows:

• JEDEC standard 1.5V (1.425V ~ 1.575V) Power Supply

• VDDQ = 1.5V (1.425V ~ 1.575V)

• 800MHz fCK for 1600Mb/sec/pin

• 8 independent internal bank

• Programmable CAS Latency: 11, 10, 9, 8, 7, 6

• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock

• 8-bit pre-fetch

• Burst Length: 8 (Interleave without any limit, sequential with

starting address “000” only), 4 with tCCD = 4 which does not

allow seamless read or write [either on the fly using A12 or

MRS]

• Bi-directional Differential Data Strobe

XMP TIMING PARAMETERS

• Internal(self) calibration : Internal self calibration through ZQ

• JEDEC: DDR3-1600 CL11-11-11 @1.5V

pin (RZQ : 240 ohm ± 1%)

• XMP Profile #1: DDR3-2400 CL11-13-14 @1.65V

• XMP Profile #2: DDR3-2133 CL11-13-13 @1.6V

• On Die Termination using ODT pin

• Average Refresh Period 7.8us at lower than TCASE 85°C,

3.9us at 85°C < TCASE < 95°C

• Asynchronous Reset

• Height 1.827” (46.41mm) w/ heatsink, single sided

component

Continued >>

kingston.com/hyperx

Document No. 4807104-001.A00 07/23/14 Page 1

中文翻译

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