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HS9-303CEH PDF预览

HS9-303CEH

更新时间: 2024-09-19 12:01:11
品牌 Logo 应用领域
英特矽尔 - INTERSIL 开关光电二极管
页数 文件大小 规格书
10页 476K
描述
Radiation Hardened BiCMOS Dual SPDT Analog Switch

HS9-303CEH 数据手册

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Radiation Hardened BiCMOS Dual SPDT Analog Switch  
HS-303CEH  
The HS-303CEH is an analog switch and a monolithic device  
that is fabricated using Intersil’s dielectrically isolated  
Features  
• QML, per MIL-PRF-38535  
• No latch-up, dielectrically isolated device islands  
Radiation Hardened Silicon Gate (RSG) process technology to  
insure latch-up free operation. It is pinout compatible and  
functionally equivalent to the HS-303RH. This switch offers  
low-resistance switching performance for analog voltages up  
to the supply rails. ON-resistance is low and stays reasonably  
constant over the full range of operating voltage and current.  
ON-resistance also stays reasonably constant when exposed to  
radiation. Break-before-make switching is controlled by 5V  
digital inputs. The HS-303CEH can operate with rails of ±15V.  
• Pinout and functionally compatible with intersil HS-303RH  
series analog switches  
• Analog signal range equal to the supply voltage range  
• Low leakage . . . . . . . . . . . . . . . . . . . . . 150nA (max, post-rad)  
• Low r . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Ω (max, post-rad)  
ON  
• Low standby supply current . . . . . . . ±150µA (max, post-rad)  
• Radiation assurance  
- High dose rate (50 to 300rad(Si)/s) . . . . . . . . 100krad(Si)  
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . 50krad(Si)*  
• Single event effects  
Specifications  
The Detailed Electrical Specifications for the HS-303CEH is  
contained in SMD 5962-95813. A “hot-link” is provided from  
our website for downloading.  
2
- For LET = 60MeV-mg/cm at 60° incident angle,  
<150pC charge transferred to the output of an off switch  
* Product capability established by initial characterization. The  
EH version is acceptance tested on a wafer-by-wafer basis to  
50krad(Si) at low dose rate.  
S
16  
14  
12  
10  
8
N
P
IN  
D
6
4
2
FIGURE 1. LOGIC CIRCUIT  
0
10  
11  
12  
13  
14  
15  
TABLE 1. TRUTH TABLE  
NEGATIVE SUPPLY VOLTAGE (V  
)
EE-  
LOGIC  
SW1 AND SW2  
SW3 AND SW4  
0
1
OFF  
ON  
ON  
FIGURE 2. RECOMMENDED OPERATING AREA IN GREY  
OFF  
April 19, 2013  
FN8399.1  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas LLC 2013. All Rights Reserved  
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.  
All other trademarks mentioned are the property of their respective owners.  
1

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