Datasheet > HMP112S6EFR6C-C4

HMP112S6EFR6C-C4

更新时间： 2024-11-04 05:36:19

品牌	Logo	应用领域
海力士 - HYNIX		动态存储器双倍数据速率
页数	文件大小	规格书
23页	516K
描述
200pin Unbuffered DDR2 SDRAM SO-DIMMs

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中文翻译

获取价格

数据手册

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HMP112S6EFR6C-C4 数据手册

200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 1Gb version E

This Hynix unbuffered Small Outline Dual In-Line Memory Module (DIMM) series consists of 1Gb version E DDR2

SDRAMs in Fine Ball Grid Array (FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 1Gb version E based

Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of indus-

try standard. It is suitable for easy interchange and addition.

FEATURES

•

JEDEC standard Double Data Rate 2 Synchronous

DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power

Supply

•

Programmable Burst Length 4 / 8 with both

sequential and interleave mode

•

Auto refresh and self refresh supported

8192 refresh cycles / 64ms

•

All inputs and outputs are compatible with SSTL_1.8

interface

Serial presence detect with EEPROM

•

Posted CAS

DDR2 SDRAM Package: 60 ball(x8), 84 ball(x16)

FBGA

Programmable CAS Latency 3,4,5, and 6

OCD (Off-Chip Driver Impedance Adjustment) and

ODT (On-Die Termination)

•

67.60 x 30.00 mm form factor

RoHS compliant & Halogen-free

•

Fully differential clock operations (CK & CK)

* This product is in compliance with the directive pertaining of RoHS

ORDERING INFORMATION

# of

DRAMs

# of

ranks

Part Name

Density

Organization

Materials

HMP164S6EFR6C-C4/Y5/S5/S6

HMP112S6EFR6C-C4/Y5/S5/S6

HMP125S6EFR8C-C4/Y5/S5/S6

512MB

1GB

64Mx64

128Mx64

256Mx64

Halogen free

2GB

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.3 / Dec. 2009

12 3 4 5 6 7...23

中文翻译

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