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HMC832ALP6GETR PDF预览

HMC832ALP6GETR

更新时间: 2024-11-05 20:57:59
品牌 Logo 应用领域
亚德诺 - ADI 电信电信集成电路
页数 文件大小 规格书
49页 1148K
描述
Fractional-N PLL with Integrated VCO 25 MHz to 3000 MHz

HMC832ALP6GETR 数据手册

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25 MHz to 3000 MHz  
Fractional-N PLL with Integrated VCO  
HMC832A  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
LD/SDO SCK SDI  
RF bandwidth: 25 MHz to 3000 MHz  
3.3 V supply  
HMC832A  
LOCK  
DETECT  
Maximum phase detector rate: 100 MHz  
Ultralow phase noise  
SPI  
SEN  
PROGRAMMING  
INTERFACE  
CONTROL  
CAL  
−110 dBc/Hz in band (typical), fO at 1600 MHz  
Fractional figure of merit (FOM): −226 dBc/Hz  
24-bit step size, 3 Hz typical resolution  
Exact frequency mode with 0 Hz frequency error  
Fast frequency hopping  
EN  
MODULATOR  
RF_P  
RF_N  
EN  
÷1, 2, 4, 6, ...62  
40-lead, 6 mm × 6 mm LFCSP package: 36 mm2  
÷N  
APPLICATIONS  
VCO  
CP  
CP  
PFD  
VTUNE  
Cellular infrastructure  
Microwave radios  
÷R  
WiMax, WiFi  
Communications test equipment  
CATV equipment  
XREFP  
Figure 1.  
DDS replacement  
Military  
Tunable reference sources for spurious-free performance  
GENERAL DESCRIPTION  
The HMC832A is a 3.3 V, high performance, wideband, frac-  
tional-N, phase-locked loop (PLL) that features an integrated  
voltage controlled oscillator (VCO) with a fundamental  
frequency of 1500 MHz to 3000 MHz and an integrated VCO  
output divider (divide by 1, 2, 4, 6, … 62) that enables the  
HMC832A to generate continuous frequencies from 25 MHz to  
3000 MHz. The integrated phase detector (PD) and Σ-Δ  
modulator, capable of operating at up to 100 MHz, permit wider  
loop bandwidths and faster frequency tuning with excellent  
spectral performance.  
The HMC832A is footprint compatible to the HMC830 PLL  
with an integrated VCO. It features 3.3 V supply and innovative  
programmable performance technology that enables the  
HMC832A to tailor current consumption and corresponding  
noise floor performance to individual applications by selecting  
either a low current consumption mode or a high performance  
mode for improved noise floor performance.  
Additional features of the HMC832A include 12 dB of RF  
output gain control in 1 dB steps; an output mute function to  
automatically mute the output during frequency changes when  
the device is not locked; selectable output return loss;  
programmable differential or single-ended outputs, with the  
ability to select either output in single-ended mode; a Σ-Δ  
modulator exact frequency mode that enables users to generate  
output frequencies with 0 Hz frequency error; and a register  
configurable 3.3 V or 1.8 V serial port interface (SPI).  
Industry leading phase noise and spurious performance, across  
all frequencies, enable the HMC832A to minimize blocker  
effects, and to improve receiver sensitivity and transmitter  
spectral purity. A low noise floor (−160 dBc/Hz eliminates any  
contribution to modulator/mixer noise floor in transmitter  
applications.  
Rev. B  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2015 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 

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