5秒后页面跳转
HM6AEB18204BP33 PDF预览

HM6AEB18204BP33

更新时间: 2024-12-01 20:50:39
品牌 Logo 应用领域
瑞萨 - RENESAS 双倍数据速率静态存储器
页数 文件大小 规格书
24页 266K
描述
2MX18 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165

HM6AEB18204BP33 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Contact Manufacturer零件包装代码:BGA
包装说明:15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165针数:165
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.87
Base Number Matches:1

HM6AEB18204BP33 数据手册

 浏览型号HM6AEB18204BP33的Datasheet PDF文件第2页浏览型号HM6AEB18204BP33的Datasheet PDF文件第3页浏览型号HM6AEB18204BP33的Datasheet PDF文件第4页浏览型号HM6AEB18204BP33的Datasheet PDF文件第5页浏览型号HM6AEB18204BP33的Datasheet PDF文件第6页浏览型号HM6AEB18204BP33的Datasheet PDF文件第7页 
HM66AEB36104/HM66AEB18204  
HM66AEB9404  
36-Mbit DDR II SRAM  
4-word Burst  
REJ03C0045-0100  
Rev.1.00  
Sep.06.2006  
Description  
The HM66AEB36104 is a 1,048,576-word by 36-bit, the HM66AEB18204 is a 2,097,152-word by 18-bit, and the  
HM66AEB9404 is a 4,194,304-word by 9-bit synchronous double data rate static RAM fabricated with advanced  
CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry  
and a burst counter. All input registers controlled by an input clock pair (K and K) and are latched on the positive edge  
of K and K. These products are suitable for applications which require synchronous operation, high speed, low voltage,  
high density and wide bit configuration. These products are packaged in 165-pin plastic FBGA package.  
Features  
1.8 V ± 0.1 V power supply for core (VDD  
1.4 V to VDD power supply for I/O (VDDQ  
DLL circuitry for wide output data valid window and future frequency scaling  
Pipelined double data rate operation  
Common data input/output bus  
Four-tick burst for reduced address frequency  
Two input clocks (K and K) for precise DDR timing at clock rising edges only  
Two output clocks (C and C) for precise flight time and clock skew matching-clock and data delivered together to  
receiving device  
)
)
Internally self-timed write control  
Clock-stop capability with µs restart  
User programmable impedance output  
Fast clock cycle time: 3.0 ns (333 MHz)/3.3 ns (300 MHz)/4.0 ns (250 MHz)/5.0 ns (200 MHz)/6.0 ns (167 MHz)  
Simple control logic for easy depth expansion  
JTAG boundary scan  
Rev.1.00 Sep 06, 2006 page 1 of 20  

与HM6AEB18204BP33相关器件

型号 品牌 获取价格 描述 数据表
HM6AEB18204BP40 RENESAS

获取价格

2MX18 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB18205BP30 RENESAS

获取价格

2MX18 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB18205BP40 RENESAS

获取价格

2MX18 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB18205BPL50 RENESAS

获取价格

2MX18 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB18205BPL60 RENESAS

获取价格

2MX18 DDR SRAM, 0.5ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BP30 RENESAS

获取价格

1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BP33 RENESAS

获取价格

1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BP40 RENESAS

获取价格

1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BPL60 RENESAS

获取价格

1MX36 DDR SRAM, 0.5ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36104BP33 RENESAS

获取价格

1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165