Datasheet > HM6AEB18205BPL50

HM6AEB18205BPL50

更新时间： 2024-12-01 15:44:35

品牌	Logo	应用领域
瑞萨 - RENESAS		双倍数据速率静态存储器
页数	文件大小	规格书
24页	261K
描述
2MX18 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165

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技术参数
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HM6AEB18205BPL50 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Contact Manufacturer	零件包装代码：	BGA
包装说明：	15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165	针数：	165
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.87
Base Number Matches：	1

HM6AEB18205BPL50 数据手册

HM66AEB36105/HM66AEB18205

HM66AEB9405

36-Mbit DDR II SRAM Separate I/O

2-word Burst

REJ03C0047-0100

Rev.1.00

Sep.06.2006

Description

The HM66AEB36105 is a 1,048,576-word by 36-bit, the HM66AEB18205 is a 2,097,152-word by 18-bit, and the

HM66AEB9405 is a 4,194,304-word by 9-bit synchronous double data rate static RAM fabricated with advanced

CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry

and a burst counter. All input registers controlled by an input clock pair (K and K) and are latched on the positive edge

of K and K. These products are suitable for applications which require synchronous operation, high speed, low voltage,

high density and wide bit configuration. These products are packaged in 165-pin plastic FBGA package.

Features

•

1.8 V ± 0.1 V power supply for core (V_DD

1.4 V to V_DDpower supply for I/O (V_DDQ

DLL circuitry for wide output data valid window and future frequency scaling

Separate independent read and write data ports

DDR read or write operation initiated each cycle

Separate data input/output bus

Two-tick burst for low DDR transaction size

Two input clocks (K and K) for precise DDR timing at clock rising edges only

Two output clocks (C and C) for precise flight time and clock skew matching-clock and data delivered together to

receiving device

)

•

Internally self-timed write control

Clock-stop capability with µs restart

User programmable impedance output

Fast clock cycle time: 3.0 ns (333 MHz)/3.3 ns (300 MHz)/4.0 ns (250 MHz)/5.0 ns (200 MHz)/6.0 ns (167 MHz)

Simple control logic for easy depth expansion

JTAG boundary scan

Rev.1.00 Sep 06, 2006 page 1 of 20

12 3 4 5 6 7...24

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与HM6AEB18205BPL50相关器件

型号	品牌	获取价格	描述	数据表
HM6AEB18205BPL60	RENESAS	获取价格	2MX18 DDR SRAM, 0.5ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BP30	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BP33	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BP40	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36102BPL60	RENESAS	获取价格	1MX36 DDR SRAM, 0.5ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36104BP33	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36104BP40	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36104BPL60	RENESAS	获取价格	1MX36 DDR SRAM, 0.5ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36105BP30	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165
HM6AEB36105BP33	RENESAS	获取价格	1MX36 DDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, 1 MM PITCH, PLASTIC, FBGA-165

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