Datasheet > HEF4049BP.652

HEF4049BP.652

更新时间： 2024-11-04 12:03:15

品牌	Logo	应用领域
恩智浦 - NXP		/
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12页	141K
描述
Hex inverting buffers

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HEF4049BP.652 数据手册

HEF4049B

Hex inverting buffers

Rev. 9 — 18 November 2011

Product data sheet

1. General description

The HEF4049B provides six inverting buffers with high current output capability suitable

for driving TTL or high capacitive loads. Since input voltages in excess of the buffers’

supply voltage are permitted, the buffers may also be used to convert logic levels of up to

15 V to standard TTL levels. Their guaranteed fan-out into common bipolar logic elements

is shown in Table 3.

It operates over a recommended V_DDpower supply range of 3 V to 15 V referenced to V_SS

(usually ground). Unused inputs must be connected to V_DD, V_SS, or another input.

2. Features and benefits

 Accepts input voltages in excess of the supply voltage

 Fully static operation

 5 V, 10 V, and 15 V parametric ratings

 Standardized symmetrical output characteristics

 Specified from 40 C to +85 C

 Complies with JEDEC standard JESD 13-B

3. Applications

 LOCMOS (Local Oxidation CMOS) to DTL/TTL converter

 HIGH sink current for driving two TTL loads

 HIGH-to-LOW level logic conversion

4. Ordering information

Table 1.

Ordering information

All types operate from 40 C to +85 C.

Type number

Package

Name

Description

Version

HEF4049BP

HEF4049BT

DIP16

SO16

plastic dual in-line package; 16 leads (300 mil)

plastic small outline package; 16 leads; body width 3.9 mm

SOT38-4

SOT109-1

12 3 4 5 6 7...12

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