HDMP-0450

更新时间： 2024-02-17 00:09:26

品牌	Logo	应用领域
安捷伦 - AGILENT		光纤电信集成电路电信电路
页数	文件大小	规格书
10页	272K
描述
Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops

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中文翻译

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技术参数
数据手册

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HDMP-0450 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	QFP, QFP44,.5SQ,32
针数：	44	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.78
JESD-30 代码：	S-PQFP-G44	JESD-609代码：	e0
长度：	10 mm	功能数量：	1
端子数量：	44	封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	QFP44,.5SQ,32
封装形状：	SQUARE	封装形式：	FLATPACK
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	2.45 mm
子类别：	Other Telecom ICs	最大压摆率：	0.185 mA
标称供电电压：	3.3 V	表面贴装：	YES
技术：	BIPOLAR	电信集成电路类型：	TELECOM CIRCUIT
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.8 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	10 mm
Base Number Matches：	1

HDMP-0450 数据手册

Agilent HDMP-0450

Quad Port Bypass Circuit

for Fibre Channel Arbitrated Loops

Data Sheet

Features

• Supports 1.0625 GBd Fibre Channel

operation

• Supports 1.25 GBd Gigabit Ethernet

(GE) operation

Description

• Quad PBC in one package

• Signal detect on FM_NODE[0] input

• Equalizers on all inputs

pins. Figure 2 shows connection

diagrams for disk drive array

applications. When the “disk

bypassed” mode is selected, the

disk drive is either absent or

nonfunctional and the loop

bypasses the hard disk.

The HDMP-0450 is a Quad Port

Bypass Circuit (PBC) which

provides a low-cost, low-power

physical-layer solution for Fibre

Channel Arbitrated Loop (FC-AL)

disk array configurations. By using a

PBC such as the HDMP-0450, hard

disks may be pulled out or swapped

while other disks in the array are

available to the system.

• High speed LVPECL I/O

• Buffered Line Logic (BLL) outputs

(no external bias resistors required)

• 0.5 W typical power at V = 3.3 V

The “disk bypassed” mode is

enabled by pulling the BYPASS[n]-

pin low. Leave BYPASS[n]-

floating to enable the “disk in

loop” mode. HDMP-0450s may be

cascaded with other members of

the HDMP-04XX/HDMP-05XX

family through the appropriate

FM_NODE[n]± and

• 44 Pin, 10 mm, low-cost plastic QFP

package

A PBC consists of multiple 2:1

multiplexers daisy chained together.

Each port has two modes of

Applications

• RAID, JBOD, BTS cabinets

• Two 2:1 muxes

operation: “disk in loop” and “disk

bypassed.” When the “disk in loop”

mode is selected, the loop goes into

and out of the disk drive at that

port. For example, data goes from

the HDMP-0450’s TO_NODE[n]±

differential output pins to the Disk

Drive Transceiver IC’s (e.g., an

HDMP-1636A) Rx differential input

pins. Data from the Disk Drive

Transceiver IC’s Tx differential

outputs goes to the HDMP-0450’s

FM_NODE[n]± differential input

• Two 1:2 buffers

• 1 => N gigabit serial buffer

• N => 1 gigabit serial mux

TO_NODE[n]± pins to

accommodate any number of hard

disks (see Figure 3). The unused

cells in the HDMP-0450 may be

bypassed by using pulldown

resistors on the BYPASS[n]- pins

for these cells.

An HDMP-0450 may also be

configured as five 1:1 buffers, as

two 2:1 multiplexers, or as two

1:2 buffers.

HDMP-0450

CAUTION: As with all semiconductor ICs, it is advised that normal static precautions be taken in the handling

and assembly of this component to prevent damage and/or degradation which may be induced by electrostatic

discharge (ESD).

12 3 4 5 6 7...10

中文翻译

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与HDMP-0450相关器件

型号	品牌	获取价格	描述	数据表
HDMP-0451G	PMC	获取价格	Telecom Circuit, PQFP44,
HDMP-0452	AGILENT	获取价格	Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops
HDMP-0480	AGILENT	获取价格	Octal Cell Port Bypass Circuit without Clock and Data Recovery
HDMP-0482	AGILENT	获取价格	Octal Cell Port Bypass Circuit with CDR and Data Valid Detection
HDMP-0482	HP	获取价格	Octal Cell Port Bypass Circuit with CDR and Data Valid Detection
HDMP-0482G	PMC	获取价格	ATM/SONET/SDH Clock Recovery Circuit, PQFP64,
HDMP-0552	ETC	获取价格	AGILENT HDMP-0552 QUAD PORT BYPASS CIRCUIT WITH CDR AND DATA VALID DETECTION
HDMP1000	ETC	获取价格	Optoelectronic
HDMP-1000	AGILENT	获取价格	Telecom Circuit, 1-Func, Bipolar, CQFP68, CERAMIC, QFP-68
HDMP-1002	ETC	获取价格	Receiver

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