Datasheet > HDMP-0552

HDMP-0552

更新时间： 2024-10-03 21:55:07

品牌	Logo	应用领域
其他 - ETC		电信集成电路信息通信管理异步传输模式 ATM
页数	文件大小	规格书
12页	267K
描述
AGILENT HDMP-0552 QUAD PORT BYPASS CIRCUIT WITH CDR AND DATA VALID DETECTION

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HDMP-0552 数据手册

Agilent HDMP-0552 Quad Port Bypass

Circuit with CDR and Data Valid

Detection

For Fibre Channel Arbitrated Loops

Data Sheet

Features

•

Supports 1.0625/2.125 GBd Fibre

Channel operation

•

Quad PBC/CDR in one package

CDR location determined by

choice of cable input/output

Amplitude valid detection on

FM_NODE[0] input

•

Data valid detection on

FM_NODE[0] input

– Run length violation detection

– Comma detection

– Configurable for both single-

frame and multi-frame

detection

Speed select pin for 1 or 2 GBd

operation

Single REFCLK for 1 or 2 GBd

operation

CDR selectable via external pin

Enable/disable equalizers on all

inputs

Enable/disable selected high-

speed output drivers

High speed LVPECL I/O

Buffered line logic (BLL) outputs

(no external bias resistors

required)

Description

The HDMP-0552 is a Quad Port

Bypass Circuit (PBC) with Clock

and Data Recovery (CDR) and

data valid detection capability

included. See Figure 1 for block

diagram. This device minimizes

part count, cost and jitter

accumulation while repeating

incoming signals. Port Bypass

Circuits are used in hard disk

arrays constructed in Fibre

HDMP-0552’s TO_NODE[n]

differential output pins to the

Disk Drive Transceiver IC (for

example, an HDMP-263x) Rx

differential input pins. Data from

the Disk Drive Transceiver IC

Tx differential output pins goes

to HDMP-0552’s FM_NODE[n]

differential input pins. Figure 2

and Figure 3 show connection

diagrams for disk drive array

•

Channel Arbitrated Loop (FC-AL) applications. When the “disk

•

configurations. By using Port

Bypass Circuits, hard disks may

be pulled out or swapped while

other disks in the array are

available to the system.

bypassed” mode is selected, the

disk drive is either absent or

nonfunctional, and the loop

bypasses the hard disk.

•

1.1 W typical power at V = 3.3 V

Multiple HDMP-0552’s may be

cascaded or connected to other

members of the HDMP-04xx

family through the FM_LOOP and

TO_LOOP pins to create loops for

Advanced 0.35 µ BiCMOS

technology

64 Pin, 10 mm, low cost plastic

QFP package

A PBC consists of multiple 2:1

multiplexers daisy chained along

with a CDR. Each port has two

modes of operation: “disk in

•

loop” and “disk bypassed.” When arrays of disk drives greater than

Applications

the “disk in loop” mode is

4. See Table 3 to identify which

of the 5 cells (0:4) provides

FM_LOOP, TO_LOOP pins (cell

connected to cable).

•

RAID, JBOD, BTS cabinets

1=> 1-4 serial buffer with or

without CDR

selected, the loop goes into and

out of the disk drive at that port.

For example, data goes from the

•

CAUTION: As with all semiconductor ICs, it is advised that normal static precautions be taken in the handling and assembly of

this component to prevent damage and/or degradation which may be induced by electrostatic discharge (ESD).

12 3 4 5 6 7...12

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