HD74HC688FP-EL

更新时间： 2024-09-13 12:59:15

品牌	Logo	应用领域
瑞萨 - RENESAS		比较器
页数	文件大小	规格书
8页	111K
描述
暂无描述

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中文翻译

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数据手册

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HD74HC688FP-EL 数据手册

HD74HC688

8-bit Magnitude Comparator

REJ03D0643–0200

(Previous ADE-205-529)

Rev.2.00

Mar 30, 2006

Description

The HD74HC688 compares bit for bit two 8-bit words and indicates whether or not they are equal. The P=Q output

indicates equality when it is low.

A single active low enable is provided to facilitate cascading of several packages and enable comparison of words

greater than 8-bits.

This device is useful in memory block decoding applications, where memory block enable signals must be generated

from computer address information.

Features

•

High Speed Operation: t_pd(P or Q to Output) = 17 ns typ (C_L= 50 pF)

High Output Current: Fanout of 10 LSTTL Loads

Wide Operating Voltage: V_CC= 2 to 6 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I_CC(static) = 4 µA max (Ta = 25°C)

Ordering Information

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

Part Name

HD74HC688P

Package Type

DILP-20 pin (JEDEC)

SOP-20 pin (JEITA)

SOP-20 pin (JEDEC)

PRDP0020AC-B

(DP-20NEV)

—

PRSP0020DD-B

(FP-20DAV)

HD74HC688FPEL

HD74HC688RPEL

EL (2,000 pcs/reel)

EL (1,000 pcs/reel)

PRSP0020DC-A

(FP-20DBV)

Function Table

Input

Output P=Q

Data P, Q

Enable G

P=Q

P>Q

P<Q

H : high level

low level

irrelevant

Rev.2.00, Mar 30, 2006 page 1 of 7

12 3 4 5 6 7 8

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