HCTS299MS
Radiation Hardened
8-Bit Universal Shift Register; Three-State
August 1995
Features
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
1
2
3
4
5
6
7
8
9
VCC
S1
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
20
19
18 DS7
17 Q7
16 I/O7
15 I/O5
14 I/O3
13 I/O1
• Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
MR
12
CP
GND 10
11 DS0
• LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
MR
GND
DS0
Ordering Information
PART NUMBER
HCTS299DMSR
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
20 Lead SBDIP
o
o
-55 C to +125 C
Intersil Class S Equivalent
o
o
HCTS299KMSR
-55 C to +125 C
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
20 Lead SBDIP
o
HCTS299D/Sample
HCTS299K/Sample
HCTS299HMSR
+25 C
Sample
Sample
Die
o
+25 C
20 Lead Ceramic Flatpack
Die
o
+25 C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518640
File Number 3069.1
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