HCTS273MS
Radiation Hardened
Octal D Flip-Flop
September 1995
Features
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
TOP VIEW
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
1
2
3
4
5
6
7
8
9
VCC
Q7
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
20
19
18 D7
17 D6
16 Q6
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s. 20ns Pulse
• Latch-Up Free Under Any Conditions
15
Q5
14 D5
13 D4
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
12
Q4
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
GND 10
11 CP
• LSTTL Input Compatibility
- VIL = 0.8V Max
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
TOP VIEW
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
MR
Q0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
Description
D0
The Intersil HCTS273MS is a Radiation Hardened octal D flip-
flop, positive edge triggered, with reset.
D1
Q1
The HCTS273MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Q2
D2
D3
Q3
The HCTS273MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
GND
Ordering Information
PART NUMBER
HCTS273DMSR
TEMPERATURE RANGE
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
PACKAGE
o
o
-55 C to +125 C
20 Lead SBDIP
o
o
HCTS273KMSR
-55 C to +125 C
20 Lead Ceramic Flatpack
20 Lead SBDIP
o
HCTS273D/Sample
HCTS273K/Sample
HCTS273HMSR
+25 C
o
+25 C
Sample
20 Lead Ceramic Flatpack
Die
o
+25 C
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518642
File Number 2274.2
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