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HCTS164D PDF预览

HCTS164D

更新时间: 2024-11-02 04:43:03
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英特矽尔 - INTERSIL 移位寄存器
页数 文件大小 规格书
8页 272K
描述
Radiation Hardened 8-Bit Serial-In/Parallel-Out Shift Register

HCTS164D 数据手册

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TM  
HCTS164MS  
Radiation Hardened  
8-Bit Serial-In/Parallel-Out Shift Register  
August 1995  
Features  
Pinouts  
• 3 Micron Radiation Hardened CMOS SOS  
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835, CDIP2-T14  
• Total Dose 200K RAD (Si)  
TOP VIEW  
12  
• Dose Rate Survivability >10 RAD (Si)/s (20ns Pulse)  
10  
• Dose Rate Upset >10 RAD (Si)/s (20ns Pulse)  
DS1  
DS2  
Q0  
VCC  
Q7  
1
2
3
4
5
6
7
14  
13  
-9  
• Single Event Ray Upset Rate < 2 x 10 Errors/Bit Day  
(Typ)  
12 Q6  
2
• LET Threshold >100 MEV-cm /mg  
Q1  
Q5  
Q4  
MR  
CP  
11  
10  
9
• Latch-Up-Free Under Any Conditions  
Q2  
o
o
• Military Temperature Range: -55 C to +125 C  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
Q3  
GND  
8
• Input Logic Levels  
-VIL = 0.8 VCC (Max)  
-VIH = VCC/2 (Min)  
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835, CDFP3-F14  
TOP VIEW  
• Input Current Levels Ii 5µA at VOL, VOH  
DS1  
DS2  
Q0  
VCC  
Q7  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Description  
Q6  
The Intersil HCTS164MS is a radiation hardened 8-bit Serial-In/  
Parallel-Out Shift Register with asynchronous reset.  
Q1  
Q5  
Q2  
Q4  
The HCTS164MS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of the  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
Q3  
MR  
CP  
GND  
8
Ordering Information  
PART NUMBER  
HCTS164DMSR  
TEMPERATURE RANGE  
-55oC to +125oC  
-55oC to +125oC  
+25oC  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
14 Lead SBDIP  
HCTS164KMSR  
14 Lead Ceramic Flatpack  
14 Lead SBDIP  
HCTS164D/Sample  
HCTS164K/Sample  
HCTS164HMSR  
+25oC  
+25oC  
Sample  
14 Lead Ceramic Flatpack  
Die  
Die  
Truth Table  
INPUTS  
OUTPUTS  
OPERATING  
MODE  
MR  
L
CP  
DS1  
DS2†  
Q0  
L
Q1-Q7  
L-L  
Reset (Clear)  
Shift  
X
X
L
X
L
H
L
q0 -q6  
q0 - q6  
q0 - q6  
q0 - q6  
H
L
H
L
L
H
H
H
L
H
H
H
H = High Voltage Level  
L = Low Voltage Level  
= LOW-to-HIGH clock transition  
q = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH clock transition  
= DS1 and DS2 inputs must be at state one setup prior to CP (rising edge)  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
FN 3386.1  
Spec Number 518613  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
1

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