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HCPL2601SDM PDF预览

HCPL2601SDM

更新时间: 2024-09-14 11:10:39
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
18页 640K
描述
High Speed 10MBit/s Logic Gate Optocoupler

HCPL2601SDM 技术参数

生命周期:ActiveReach Compliance Code:compliant
风险等级:5.66光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
Base Number Matches:1

HCPL2601SDM 数据手册

 浏览型号HCPL2601SDM的Datasheet PDF文件第2页浏览型号HCPL2601SDM的Datasheet PDF文件第3页浏览型号HCPL2601SDM的Datasheet PDF文件第4页浏览型号HCPL2601SDM的Datasheet PDF文件第5页浏览型号HCPL2601SDM的Datasheet PDF文件第6页浏览型号HCPL2601SDM的Datasheet PDF文件第7页 
8-Pin DIP High-Speed  
10 MBit/s Logic Gate  
Optocouplers  
Single-Channel: 6N137M,  
HCPL2601M, HCPL2611M  
Dual-Channel: HCPL2630M,  
HCPL2631M  
www.onsemi.com  
PDIP8 6.6x3.81, 2.54P  
Description  
CASE 646BW  
8
The 6N137M, HCPL2601M, HCPL2611M singlechannel and  
HCPL2630M, HCPL2631M dualchannel optocouplers consist of a  
850 nm AlGaAs LED, optically coupled to a very high speed  
integrated photodetector logic gate with a strobable output. This  
output features an open collector, thereby permitting wired OR  
outputs. The switching parameters are guaranteed over the  
temperature range of 40°C to +85°C. A maximum input signal of  
5 mA will provide a minimum output sink current of 13 mA (fan out  
of 8).  
An internal noise shield provides superior common mode rejection  
of typically 10 kV/ms. The HCPL2601M and HCPL2631M has a  
minimum CMR of 5 kV/ms. The HCPL2611M has a minimum CMR  
of 10 kV/ms.  
1
PDIP8 9.655x6.6, 2.54P  
CASE 646CQ  
8
8
1
1
PDIP8 GW  
CASE 709AC  
Features  
PDIP8 GW  
CASE 709AD  
Very High Speed – 10 MBit/s  
Superior CMR – 10 kV/ms  
Fanout of 8 Over 40°C to +85°C  
Logic Gate Output  
8
1
MARKING DIAGRAM  
Strobable Output  
Wired ORopen Collector  
Safety and Regulatory Approvals  
ON  
6N137  
VXXYYB  
UL1577, 5,000 VAC  
for 1 Minute  
RMS  
DIN EN/IEC6074755  
These are PbFree Devices  
6N137  
V
= Device Number  
= DIN EN/IEC6074755 Option (only  
appears on component ordered with  
this option)  
= TwoDigit Year Code, e.g., ‘16’  
= TwoDigit Work Week, Ranging from  
‘01’ to ‘53’  
Applications  
Ground Loop Elimination  
XX  
YY  
LSTTL to TTL, LSTTL or 5 V CMOS  
Line Receiver, Data Transmission  
Data Multiplexing  
B
= Assembly Package Code  
Switching Power Supplies  
Pulse Transformer Replacement  
Computerperipheral Interface  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 14 of  
this data sheet.  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
June, 2021 Rev. 2  
HCPL2631M/D  

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