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HCF4096 PDF预览

HCF4096

更新时间: 2024-11-19 23:54:59
品牌 Logo 应用领域
其他 - ETC 触发器
页数 文件大小 规格书
10页 185K
描述
GATE J-K MASTER-SLAVE FLIP-FLOPS

HCF4096 数据手册

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HCF4096B  
GATED J-K MASTER SLAVE FLIP-FLOP  
16MHz TOGGLE RATE (Typ.) at  
- V = 10V  
V
DD  
SS  
GATED INPUTS  
QUIESCENT CURRENT SPECIFIED UP TO  
20V  
5V, 10V AND 15V PARAMETRIC RATINGS  
INPUT LEAKAGE CURRENT  
DIP  
SOP  
I = 100nA (MAX) AT V = 18V T = 25°C  
I
DD  
A
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALL REQUIREMENTS OF JEDEC  
JESD13B "STANDARD SPECIFICATIONS  
FOR DESCRIPTION OF B SERIES CMOS  
DEVICES"  
ORDER CODES  
PACKAGE  
TUBE  
T & R  
DIP  
HCF4096BEY  
HCF4096BM1  
SOP  
HCF4096M013TR  
DESCRIPTION  
HCF4096B is a monolithic integrated circuit  
fabricated in Metal Oxide Semiconductor  
technology available in DIP and SOP packages.  
HCF4096B is a J-K Master-Slave Flip-Flop  
featuring separate AND gating of multiple J and K  
inputs. The gated J-K input control transfers  
information into the master section during clocked  
operation. Information on the J-K inputs is  
transferred to the Q and Q outputs on the positive  
edge of the clock pulse. SET and RESET inputs  
(active high) are provided for asynchronous  
operation.  
PIN CONNECTION  
September 2002  
1/10  

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