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HCF4095BEY PDF预览

HCF4095BEY

更新时间: 2024-11-19 22:57:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
13页 297K
描述
GATE J-K MASTER-SLAVE FLIP-FLOPS

HCF4095BEY 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.63
其他特性:3 J & 3 K INPUTS ANDED系列:4000/14000/40000
JESD-30 代码:R-PDIP-T14JESD-609代码:e3
负载电容(CL):50 pF逻辑集成电路类型:J-K FLIP-FLOP
最大频率@ Nom-Sup:3500000 Hz位数:2
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE电源:5/15 V
传播延迟(tpd):500 ns认证状态:Not Qualified
座面最大高度:5.1 mm子类别:FF/Latches
最大供电电压 (Vsup):20 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:12 MHzBase Number Matches:1

HCF4095BEY 数据手册

 浏览型号HCF4095BEY的Datasheet PDF文件第2页浏览型号HCF4095BEY的Datasheet PDF文件第3页浏览型号HCF4095BEY的Datasheet PDF文件第4页浏览型号HCF4095BEY的Datasheet PDF文件第5页浏览型号HCF4095BEY的Datasheet PDF文件第6页浏览型号HCF4095BEY的Datasheet PDF文件第7页 
HCC/HCF4095B  
HCC/HCF4096B  
GATE J-K MASTER-SLAVE FLIP-FLOPS  
.
16 MHz TOGGLE RATE (typ.) AT  
VDD - VSS = 10V  
GATED INPUTS  
QUIESCENT CURRENT SPECIFIED TO 20v  
FOR HCC DEVICE  
5V, 10V AND 15V PARAMETRIC RATINGS  
INPUT CURRENTOF 100nA AT18VAND 25oC  
FOR HCC DEVICE  
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALLREQUIREMENTS OF JEDECTEN-  
TATIVE STANDARD No 13 A, ”STANDARD  
SPECIFICATIONS FOR DESCRIPTION OF B  
SERIES CMOS DEVICES”  
inputs is transferred to the Q and Q outputs on the  
positive edge of the clock pulse. SET and RESET  
inputs (active high) are provided for asynchronous  
.
.
operation.  
.
.
.
.
EY  
F
(Plastic Package)  
(Ceramic Package)  
DESCRIPTION  
The HCC4095B/4096B (extended temperature  
range) and HCF4095B/4096B (intermediate tem-  
perature range) are monolithic integrated circuits,  
available in 14 lead dual in-line plastic or ceramic  
package and plastic micropackage.  
M1  
C1  
(Micro Package)  
(Chip Carrier)  
The HCC/HCF4095B and HCC/HCF4096B are J-K  
Master-Slave Flip-Flops featuring separate AND  
gatingof multiple J and Kinputs. The gated J-K input  
control transfer of information into the master sec-  
tion during clocked operation. Information onthe J-K  
ORDER CODES :  
HCC40XXBF  
HCF40XXBEY  
HCF40XXBM1  
HCF40XXBC1  
PIN CONNECTIONS  
4095B  
4096B  
September 1988  
1/13  

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