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FDV303 PDF预览

FDV303

更新时间: 2024-09-15 22:31:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
4页 68K
描述
Digital FET, N-Channel

FDV303 数据手册

 浏览型号FDV303的Datasheet PDF文件第2页浏览型号FDV303的Datasheet PDF文件第3页浏览型号FDV303的Datasheet PDF文件第4页 
August 1997  
FDV303N  
Digital FET, N-Channel  
General Description  
Features  
25 V, 0.68 A continuous, 2 A Peak.  
These N-Channel enhancement mode field effect transistors are  
produced using Fairchild's proprietary, high cell density, DMOS  
technology. This very high density process is tailored to minimize  
on-state resistance at low gate drive conditions. This device is  
designed especially for application in battery circuits using either  
one lithium or three cadmium or NMH cells. It can be used as an  
inverter or for high-efficiency miniature discrete DC/DC  
conversion in compact portable electronic devices like cellular  
phones and pagers. This device has excellent on-state  
resistance even at gate drive voltages as low as 2.5 volts.  
RDS(ON) = 0.45 W @ VGS = 4.5 V  
RDS(ON) = 0.6 W @ VGS= 2.7 V.  
Very low level gate drive requirements allowing direct  
operation in 3V circuits. VGS(th) < 1.5V.  
Gate-Source Zener for ESD ruggedness.  
>6kV Human Body Model  
Compact industry standard SOT-23 surface mount  
package.  
Alternative to TN0200T and TN0201T.  
SuperSOTTM-8  
SuperSOTTM-6  
SOT-23  
SO-8  
SOIC-16  
SOT-223  
Mark:303  
D
S
G
Absolute Maximum Ratings TA = 25oC unless other wise noted  
Symbol Parameter  
FDV303N  
Units  
Drain-Source Voltage, Power Supply Voltage  
Gate-Source Voltage, VIN  
25  
V
VDSS  
VGSS  
ID  
8
V
A
Drain/Output Current  
- Continuous  
- Pulsed  
0.68  
2
Maximum Power Dissipation  
0.35  
W
°C  
kV  
PD  
Operating and Storage Temperature Range  
-55 to 150  
6.0  
TJ,TSTG  
ESD  
Electrostatic Discharge Rating MIL-STD-883D  
Human Body Model (100pf / 1500 Ohm)  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Ambient  
357  
°C/W  
RqJA  
© 1997 Fairchild Semiconductor Corporation  
FDV303N Rev.D1  

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