TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,
TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
www.ti.com
SPRS945F – JANUARY 2017 – REVISED FEBRUARY 2021
SPRS945F – JANUARY 2017 – REVISED FEBRUARY 2021
TMS320F28004x Microcontrollers
– Embedded Real-time Analysis and Diagnostic
(ERAD)
Communications peripherals
– One Power-Management Bus (PMBus)
interface
1 Features
•
TMS320C28x 32-bit CPU
•
– 100 MHz
– IEEE 754 single-precision Floating-Point Unit
(FPU)
– One Inter-integrated Circuit (I2C) interface
(pin-bootable)
– Trigonometric Math Unit (TMU)
•
3×-cycle to 4×-cycle improvement for
common trigonometric functions versus
software libraries
– Two Controller Area Network (CAN) bus ports
(pin-bootable)
– Two Serial Peripheral Interface (SPI) ports
(pin-bootable)
•
13-cycle Park transform
– Viterbi/Complex Math Unit (VCU-I)
– Ten hardware breakpoints (with ERAD)
Programmable Control Law Accelerator (CLA)
– 100 MHz
– IEEE 754 single-precision floating-point
instructions
– Two Serial Communication Interfaces (SCIs)
(pin-bootable)
– One Local Interconnect Network (LIN)
– One Fast Serial Interface (FSI) with a
transmitter and receiver
Analog system
– Three 3.45-MSPS, 12-bit Analog-to-Digital
Converters (ADCs)
•
•
•
– Executes code independently of main CPU
On-chip memory
•
•
Up to 21 external channels
Four integrated post-processing blocks
(PPBs) per ADC
– 256KB (128KW) of flash (ECC-protected)
across two independent banks
– 100KB (50KW) of RAM (ECC-protected or
parity-protected)
– Dual-zone security supporting third-party
development
– Seven windowed comparators (CMPSS) with
12-bit reference Digital-to-Analog Converters
(DACs)
•
Digital glitch filters
– Unique Identification (UID) number
Clock and system control
– Two 12-bit buffered DAC outputs
•
– Seven Programmable Gain Amplifiers (PGAs)
– Two internal zero-pin 10-MHz oscillators
– On-chip crystal oscillator and external clock
input
•
•
Programmable gain settings: 3, 6, 12, 24
Programmable output filtering
– Windowed watchdog timer module
– Missing clock detection circuitry
1.2-V core, 3.3-V I/O design
– Internal VREG or DC-DC for 1.2-V generation
allows for single-supply designs
– Brownout reset (BOR) circuit
System peripherals
•
Enhanced control peripherals
– 16 ePWM channels with high-resolution
capability (150-ps resolution)
•
•
•
Integrated dead-band support with high
resolution
•
Integrated hardware trip zones (TZs)
– Seven Enhanced Capture (eCAP) modules
•
High-resolution Capture (HRCAP) available
on two modules
– 6-channel Direct Memory Access (DMA)
controller
– Two Enhanced Quadrature Encoder Pulse
(eQEP) modules with support for CW/CCW
operation modes
– Four Sigma-Delta Filter Module (SDFM) input
channels (two parallel filters per channel)
– 40 individually programmable multiplexed
General-Purpose Input/Output (GPIO) pins
– 21 digital inputs on analog pins
– Enhanced Peripheral Interrupt Expansion
(ePIE) module
•
•
Standard SDFM data filtering
Comparator filter for fast action for
overvalue or undervalue condition
– Multiple low-power mode (LPM) support with
external wakeup
•
Configurable Logic Block (CLB)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C
TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C
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