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EVAL-AD7276CBZ PDF预览

EVAL-AD7276CBZ

更新时间： 2024-12-01 12:55:31
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亚德诺 - ADI /
页数 文件大小 规格书
28页 501K
描述
3 MSPS, 12-/10-/8-Bit ADCs in 6-Lead TSOT

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EVAL-AD7276CBZ 数据手册

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3 MSPS, 12-/10-/8-Bit  
ADCs in 6-Lead TSOT  
AD7276/AD7277/AD7278  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
V
DD  
Throughput rate: 3 MSPS  
Specified for VDD of 2.35 V to 3.6 V  
Power consumption  
12.6 mW at 3 MSPS with 3 V supplies  
Wide input bandwidth  
70 dB SNR at 1 MHz input frequency  
Flexible power/serial clock speed management  
No pipeline delays  
12-/10-/8-BIT  
SUCCESSIVE  
APPROXIMATION  
ADC  
V
T/H  
IN  
High speed serial interface  
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible  
Temperature range: −40°C to +125°C  
Power-down mode: 0.1 μA typical  
6-lead TSOT package  
SCLK  
SDATA  
CS  
AD7276/  
AD7277/  
AD7278  
CONTROL  
LOGIC  
8-lead MSOP package  
AD7476 and AD7476A pin-compatible  
GND  
Figure 1.  
GENERAL DESCRIPTION  
Table 1.  
Part Number  
The AD7276/AD7277/AD7278 are 12-/10-/8-bit, high speed,  
low power, successive approximation analog-to-digital converters  
(ADCs), respectively. The parts operate from a single 2.35 V  
to 3.6 V power supply and feature throughput rates of up to  
3 MSPS. The parts contain a low noise, wide bandwidth track-  
and-hold amplifier that can handle input frequencies in excess  
of 55 MHz.  
Resolution  
Package  
AD7276  
AD7277  
AD7278  
AD72741  
AD72731  
12  
10  
8
12  
10  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
6-Lead TSOT  
6-Lead TSOT  
6-Lead TSOT  
8-Lead TSOT  
8-Lead TSOT  
The conversion process and data acquisition are controlled  
1 Part contains external reference pin.  
using  
and the serial clock, allowing the devices to interface  
CS  
PRODUCT HIGHLIGHTS  
with microprocessors or DSPs. The input signal is sampled on  
the falling edge of , and the conversion is also initiated at this  
CS  
point. There are no pipeline delays associated with the part.  
1. 3 MSPS ADCs in a 6-lead TSOT package.  
2. AD7476/AD7477/AD7478 and AD7476A/AD7477A/  
AD7478A pin-compatible.  
3. High throughput with low power consumption.  
4. Flexible power/serial clock speed management. This allows  
maximum power efficiency at low throughput rates.  
5. Reference derived from the power supply.  
6. No pipeline delay. The parts feature a standard successive  
approximation ADC with accurate control of the sampling  
The AD7276/AD7277/AD7278 use advanced design techniques  
to achieve very low power dissipation at high throughput rates.  
The reference for the part is taken internally from VDD. This  
allows the widest dynamic input range to the ADC; therefore,  
the analog input range for the part is 0 to VDD. The conversion  
rate is determined by the SCLK.  
instant via a  
input and once-off conversion control.  
CS  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 www.analog.com  
Fax: 781.461.3113 © 2005–2011 Analog Devices, Inc. All rights reserved.  
 
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