Low Cost, Low Power CMOS
General-Purpose Dual Analog Front End
a
AD73322L
FEATURES
Two 16-Bit A/D Converters
Two 16-Bit D/A Converters
FUNCTIONAL BLOCK DIAGRAM
AVDD1 AVDD2
DVDD
Programmable Input/Output Sample Rates
78 dB ADC SNR
78 dB DAC SNR
64 kS/s Maximum Sample Rate
–90 dB Crosstalk
Low Group Delay (25 ꢀs Typ per ADC Channel,
50 ꢀs Typ per DAC Channel)
AD73322L
VFBP1
VINP1
ADC CHANNEL 1
DAC CHANNEL 1
SDI
VINN1
VFBN1
SDIFS
VOUTP1
VOUTN1
SCLK
Programmable Input/Output Gain
Flexible Serial Port which Allows Up to Four Dual
Codecs to be Connected in Cascade Giving Eight
I/O Channels
Single (2.7 V to 3.3 V) Supply Operation
50 mW Typ Power Consumption at 3.0 V
Temperature Range: –40ꢁC to +105ꢁC
On-Chip Reference
SE
SPORT
REFOUT
REFCAP
REFERENCE
RESET
VFBP2
VINP2
MCLK
ADC CHANNEL 2
VINN2
VFBN2
SDOFS
SDO
VOUTP2
VOUTN2
DAC CHANNEL 2
AGND1 AGND2
28-Lead SOIC, TSSOP, and 44-Lead LQFP Packages
APPLICATIONS
General-Purpose Analog I/O
Speech Processing
DGND
Cordless and Personal Communications
Telephony
Active Control of Sound and Vibration
Data Communications
Wireless Local Loop
GENERAL DESCRIPTION
The A/D and D/A conversion channels feature programmable
input/output gains with ranges 38 dB and 21 dB respectively.
An on-chip reference voltage is included to allow single-
supply operation.
The AD73322L is a dual front-end processor for general pur-
pose applications including speech and telephony. It features
two 16-bit A/D conversion channels and two 16-bit D/A con-
version channels. Each channel provides 78 dB signal-to-noise
ratio over a voiceband signal bandwidth. It also features an
input-to-output gain network in both the analog and digital
domains. This is featured on both codecs and can be used for
impedance matching or scaling when interfacing to Subscriber
Line Interface Circuits (SLICs).
The sampling rate of the codecs is programmable with four
separate settings offering 64 kHz, 32 kHz, 16 kHz, and 8 kHz
sampling rates (from a master clock of 16.384 MHz).
A serial port (SPORT) allows easy interfacing of single or cas-
caded devices to industry standard DSP engines. The SPORT
transfer rate is programmable to allow interfacing to both fast
and slow DSP engines.
The AD73322L is particularly suitable for a variety of applica-
tions in the speech and telephony area, including low bit rate,
high quality compression, speech enhancement, recognition and
synthesis. The low group delay characteristic of the part makes
it suitable for single or multichannel active control applications.
The AD73322L is available in 28-lead SOIC, 28-lead TSSOP,
and 44-lead LQFP packages.
REV. 0
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© Analog Devices, Inc., 2001