Datasheet > EMZF20R02W

EMZF20R02W

更新时间： 2024-09-10 17:15:27

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	252K
描述
DFN3X3

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数据手册

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EMZF20R02W 数据手册

EMZF20R02W

Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

20V

20mΩ

DSON (MAX.)

Pb‐Free Lead Plating & Halogen Free

ESD Protection

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±12

UNIT

Gate‐Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 70 °C

6.5

Pulsed Drain Current¹

I_DM

T_A= 25 °C

2.1

Power Dissipation

P_D

°C

T_A= 70 °C

1.3

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Ambient³(t≦10s)

R_JA

°C / W

Junction‐to‐Ambient³

R_JA

105

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³The value of R_JAis measured with the device mounted on a 1 in²pad of 2 oz copper.

2013/11/1

p.1

12 3 4 5

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