EMP202
Single-Chip Dual-Channel AC’97
Audio Codec for PC Audio Systems
1. Features....................................................................2
2. General Description.................................................2
3. Block Diagram..........................................................3
4. Pin Assignments......................................................4
5. Pin Description.........................................................5
5.1. Digital I/O Pins ....................................................5
5.2. Analog I/O Pins...................................................5
5.3. Filter/References.................................................6
5.4. Power/Ground.....................................................6
5.5. Crystal Selection.................................................6
6. Registers...................................................................7
6.1. Mixer Registers...................................................8
6.1.1. MX00 Reset.................................................8
6.1.2. MX02 Master Volume ..................................8
6.1.3. MX04 Headphone Volume...........................9
6.1.4. MX06 MONO_OUT Volume.........................9
6.1.5. MX0A PC BEEP Volume .............................9
6.1.6. MX0C PHONE Volume..............................10
6.1.7. MX0E MIC Volume ....................................10
6.1.8. MX10 LINE_IN Volume..............................10
6.1.9. MX12 CD Volume......................................11
6.1.10. MX14 VIDEO Volume ................................11
6.1.11. MX16 AUX Volume....................................12
6.1.12. MX18 PCM_OUT Volume..........................12
6.1.13. MX1A Record Select..................................13
6.1.14. MX1C Record Gain....................................13
6.1.15. MX20 General Purpose Register...............14
6.1.16. MX22 3D Control .......................................14
6.1.17. MX26 Powerdown Control/Status..............15
6.1.18. MX28 Extended Audio ID...........................16
6.1.19. MX2A Extended Audio Status and Control 16
6.1.20. MX2C PCM Output Sample Rate ..............17
6.1.21. MX32 PCM Input Sample Rate..................17
6.1.22. MX3A S/PDIF Output Channel
6.2.1. MX3E Extended Modem Status and Control18
6.2.2. MX4C GPIO Pin Configuration................. 19
6.2.3. MX4E GPIO Pin Polarity/Type ................. 19
6.2.4. MX50 GPIO Pin Sticky ............................. 19
6.2.5. MX50 GPIO Pin Status............................. 19
6.3. Extended Registers.......................................... 20
6.3.1. MX6A SPDIF Output Select ...................... 20
6.3.2. MX72 Antipop............................................ 20
6.3.3. MX74 EAPD Access.................................. 20
6.3.4. MX7C VENDOR ID1 ................................. 20
6.3.5. MX7E VENDOR ID2.................................. 21
7. Electrical Characteristics...................................... 21
7.1. DC Characteristics ........................................... 21
7.2. AC Timing Characteristics................................ 21
7.2.1. Cold Reset ................................................ 21
7.2.2. Warm Reset .............................................. 22
7.2.3. AC-Link Clocks.......................................... 22
7.2.4. Data Output and Input Times .................... 23
7.2.5. Signal Rise and Fall Times........................ 23
7.2.6. AC-Link Low Power Mode Timing............. 24
7.2.7. ATE Test Mode ......................................... 24
7.2.8. AC-Link IO Pin Capacitance and Loading. 24
7.2.9. BIT-CLK and SDATA-IN State .................. 24
8. Analog Performance Characteristics................... 25
9. Design Suggestions.............................................. 26
9.1. Clocking............................................................ 26
9.2. AC-Link............................................................. 26
9.3. Reset................................................................ 26
9.4. CD Input ........................................................... 27
9.5. Odd Addressed Register Access...................... 27
9.6. Power-down Mode ........................................... 27
9.7. Test Mode ........................................................ 27
9.7.1. ATE In Circuit Test Mode .......................... 27
9.7.2. Vendor Specific Test Mode ....................... 27
10. Package Dimensions............................................. 28
Status and Control.................................................18
6.2. GPIO Registers.................................................18
1
8/7/2003
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