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EMG5DXV5T5G

更新时间： 2024-01-13 16:53:57
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
7页 69K
描述
Dual Bias Resistor Transistors NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network

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中文翻译

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EMG5DXV5T5G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete包装说明：SMALL OUTLINE, R-PDSO-F5
针数：5Reach Compliance Code：compliant
ECCN代码：EAR99风险等级：5.78
其他特性：BUILT-IN BIAS RESISTOR RATIO IS 4.7最大集电极电流 (IC)：0.1 A
集电极-发射极最大电压：50 V配置：COMMON EMITTER, 2 ELEMENTS WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE)：80JESD-30 代码：R-PDSO-F5
JESD-609代码：e3湿度敏感等级：1
元件数量：2端子数量：5
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
极性/信道类型：NPN最大功率耗散 (Abs)：0.338 W
认证状态：Not Qualified子类别：BIP General Purpose Small Signal
表面贴装：YES端子面层：Tin (Sn)
端子形式：FLAT端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

EMG5DXV5T5G 数据手册

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EMG2DXV5T1,  
EMG5DXV5T1  
Preferred Devices  
Dual Bias Resistor  
Transistors  
NPN Silicon Surface Mount Transistors  
http://onsemi.com  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base−emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the  
SOT−553 package which is designed for low power surface mount  
applications.  
NPN SILICON  
BIAS RESISTOR  
TRANSISTORS  
(3)  
(2)  
(1)  
R1  
Features  
R1  
DT  
R2  
R2  
• Simplifies Circuit Design  
• Reduces Board Space  
DT  
r2  
r1  
• Reduces Component Count  
• Moisture Sensitivity Level: 1  
• Available in 8 mm, 7 inch Tape and Reel  
• Lead−Free Solder Plating  
• Pb−Free Packages are Available  
(4)  
(5)  
SOT−553  
CASE 463B  
5
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Rating  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
1
V
V
CBO  
CEO  
50  
Vdc  
I
100  
mAdc  
C
MARKING  
DIAGRAM  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
5
Total Device Dissipation  
P
230 (Note 1)  
338 (Note 2)  
1.8 (Note 1)  
2.7 (Note 2)  
mW  
D
T = 25°C  
XX M G  
A
°C/W  
°C/W  
°C/W  
°C  
G
Derate above 25°C  
Thermal Resistance −  
Junction-to-Ambient  
R
q
JA  
540 (Note 1)  
370 (Note 2)  
1
xx = Device Code  
xx= UF (EMG5)  
UP (EMG2)  
Thermal Resistance −  
Junction-to-Lead  
R
q
JL  
264 (Note 1)  
287 (Note 2)  
M = Date Code  
Junction and Storage  
Temperature Range  
T , T  
−55 to +150  
J
stg  
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
ORDERING INFORMATION  
1. FR−4 @ Minimum Pad  
2. FR−4 @ 1.0 x 1.0 inch Pad  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
Preferred devices are recommended choices for future use  
and best overall value.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
October, 2005 − Rev. 0  
EMG5DXV5/D  
 
1234567

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